diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-01-25 20:21:57 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-01-25 20:21:57 +0000 |
| commit | 5d9101941f40bc23e2c1b84ce6fa444ccb0e225f (patch) | |
| tree | bb5e44506b12ecc614aad4ab730621f3da844d54 /llvm/test/MC | |
| parent | bc2d34394d1ff0edbf410fbd862173c932a3cb04 (diff) | |
| download | bcm5719-llvm-5d9101941f40bc23e2c1b84ce6fa444ccb0e225f.tar.gz bcm5719-llvm-5d9101941f40bc23e2c1b84ce6fa444ccb0e225f.zip | |
AMDGPU: Set call_convention bit in kernel_code_t
According to the documentation this is supposed to be -1
if indirect calls are not supported.
llvm-svn: 293081
Diffstat (limited to 'llvm/test/MC')
| -rw-r--r-- | llvm/test/MC/AMDGPU/hsa-exp.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/AMDGPU/hsa.s | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/MC/AMDGPU/hsa-exp.s b/llvm/test/MC/AMDGPU/hsa-exp.s index 488afc5b400..cc5dfe82ff4 100644 --- a/llvm/test/MC/AMDGPU/hsa-exp.s +++ b/llvm/test/MC/AMDGPU/hsa-exp.s @@ -124,6 +124,6 @@ amd_kernel_code_t_minimal: // ASM: group_segment_alignment = 4 // ASM: private_segment_alignment = 4 // ASM: wavefront_size = 6 -// ASM: call_convention = 0 +// ASM: call_convention = -1 // ASM: runtime_loader_kernel_symbol = 0 // ASM: .end_amd_kernel_code_t diff --git a/llvm/test/MC/AMDGPU/hsa.s b/llvm/test/MC/AMDGPU/hsa.s index b428c817ea6..21083f3915d 100644 --- a/llvm/test/MC/AMDGPU/hsa.s +++ b/llvm/test/MC/AMDGPU/hsa.s @@ -273,6 +273,6 @@ amd_kernel_code_t_minimal: // ASM: group_segment_alignment = 4 // ASM: private_segment_alignment = 4 // ASM: wavefront_size = 6 -// ASM: call_convention = 0 +// ASM: call_convention = -1 // ASM: runtime_loader_kernel_symbol = 0 // ASM: .end_amd_kernel_code_t |
