diff options
| author | Alex Bradbury <asb@lowrisc.org> | 2018-09-06 13:41:04 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2018-09-06 13:41:04 +0000 |
| commit | fea4ac01c5fc4b9626e3ba990839b2f4ba9d8575 (patch) | |
| tree | 2699638a8f96ff3af30a9d6bcdade1bf0f7815da /llvm/test/MC/RISCV/rv64d-valid.s | |
| parent | 1a00ffd65636215a534738c84d08c37d6e4dacc6 (diff) | |
| download | bcm5719-llvm-fea4ac01c5fc4b9626e3ba990839b2f4ba9d8575.tar.gz bcm5719-llvm-fea4ac01c5fc4b9626e3ba990839b2f4ba9d8575.zip | |
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
Standardise on check lines:
* CHECK-ASM
* CHECK-OBJ
* CHECK-ASM-AND-OBJ
This allows for the addition of tests involving symbol operands, which will
not result in identical instructions in both assembly and disassembled object
output.
This commit doesn't exploit this reworking to increase test coverage of symbol
operands - that will come in a future patch.
llvm-svn: 341546
Diffstat (limited to 'llvm/test/MC/RISCV/rv64d-valid.s')
| -rw-r--r-- | llvm/test/MC/RISCV/rv64d-valid.s | 51 |
1 files changed, 27 insertions, 24 deletions
diff --git a/llvm/test/MC/RISCV/rv64d-valid.s b/llvm/test/MC/RISCV/rv64d-valid.s index c8dd5696f47..06ce1d36460 100644 --- a/llvm/test/MC/RISCV/rv64d-valid.s +++ b/llvm/test/MC/RISCV/rv64d-valid.s @@ -1,50 +1,53 @@ # RUN: llvm-mc %s -triple=riscv64 -mattr=+d -riscv-no-aliases -show-encoding \ -# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s -# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+d < %s \ -# RUN: | llvm-objdump -mattr=+d -riscv-no-aliases -d - \ -# RUN: | FileCheck -check-prefix=CHECK-INST %s +# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+d < %s \ +# RUN: | llvm-objdump -mattr=+d -riscv-no-aliases -d -r - \ +# RUN: | FileCheck -check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s +# # RUN: not llvm-mc -triple riscv32 -mattr=+d < %s 2>&1 \ # RUN: | FileCheck -check-prefix=CHECK-RV32 %s -# CHECK-INST: fcvt.l.d a0, ft0, dyn -# CHECK: encoding: [0x53,0x75,0x20,0xc2] +# FIXME: error messages for rv32d are misleading + +# CHECK-ASM-AND-OBJ: fcvt.l.d a0, ft0, dyn +# CHECK-ASM: encoding: [0x53,0x75,0x20,0xc2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fcvt.l.d a0, ft0, dyn -# CHECK-INST: fcvt.lu.d a1, ft1, dyn -# CHECK: encoding: [0xd3,0xf5,0x30,0xc2] +# CHECK-ASM-AND-OBJ: fcvt.lu.d a1, ft1, dyn +# CHECK-ASM: encoding: [0xd3,0xf5,0x30,0xc2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fcvt.lu.d a1, ft1, dyn -# CHECK-INST: fmv.x.d a2, ft2 -# CHECK: encoding: [0x53,0x06,0x01,0xe2] +# CHECK-ASM-AND-OBJ: fmv.x.d a2, ft2 +# CHECK-ASM: encoding: [0x53,0x06,0x01,0xe2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fmv.x.d a2, ft2 -# CHECK-INST: fcvt.d.l ft3, a3, dyn -# CHECK: encoding: [0xd3,0xf1,0x26,0xd2] +# CHECK-ASM-AND-OBJ: fcvt.d.l ft3, a3, dyn +# CHECK-ASM: encoding: [0xd3,0xf1,0x26,0xd2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fcvt.d.l ft3, a3, dyn -# CHECK-INST: fcvt.d.lu ft4, a4, dyn -# CHECK: encoding: [0x53,0x72,0x37,0xd2] +# CHECK-ASM-AND-OBJ: fcvt.d.lu ft4, a4, dyn +# CHECK-ASM: encoding: [0x53,0x72,0x37,0xd2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fcvt.d.lu ft4, a4, dyn -# CHECK-INST: fmv.d.x ft5, a5 -# CHECK: encoding: [0xd3,0x82,0x07,0xf2] +# CHECK-ASM-AND-OBJ: fmv.d.x ft5, a5 +# CHECK-ASM: encoding: [0xd3,0x82,0x07,0xf2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fmv.d.x ft5, a5 # Rounding modes -# CHECK-INST: fcvt.d.l ft3, a3, rne -# CHECK: encoding: [0xd3,0x81,0x26,0xd2] +# CHECK-ASM-AND-OBJ: fcvt.d.l ft3, a3, rne +# CHECK-ASM: encoding: [0xd3,0x81,0x26,0xd2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fcvt.d.l ft3, a3, rne -# CHECK-INST: fcvt.d.lu ft4, a4, rtz -# CHECK: encoding: [0x53,0x12,0x37,0xd2] +# CHECK-ASM-AND-OBJ: fcvt.d.lu ft4, a4, rtz +# CHECK-ASM: encoding: [0x53,0x12,0x37,0xd2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fcvt.d.lu ft4, a4, rtz -# CHECK-INST: fcvt.l.d a0, ft0, rdn -# CHECK: encoding: [0x53,0x25,0x20,0xc2] +# CHECK-ASM-AND-OBJ: fcvt.l.d a0, ft0, rdn +# CHECK-ASM: encoding: [0x53,0x25,0x20,0xc2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fcvt.l.d a0, ft0, rdn -# CHECK-INST: fcvt.lu.d a1, ft1, rup -# CHECK: encoding: [0xd3,0xb5,0x30,0xc2] +# CHECK-ASM-AND-OBJ: fcvt.lu.d a1, ft1, rup +# CHECK-ASM: encoding: [0xd3,0xb5,0x30,0xc2] # CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled fcvt.lu.d a1, ft1, rup |
