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| author | Simon Dardis <simon.dardis@mips.com> | 2018-05-15 11:10:30 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@mips.com> | 2018-05-15 11:10:30 +0000 |
| commit | b79ecec20d564a60c9ff8f4ac5994594e96701ea (patch) | |
| tree | 28eac65be3be9fa230bde9aa6eead08b875d46c1 /llvm/test/MC/Mips | |
| parent | 761c2247b44a4128e715fe71a1faeadd28d4028a (diff) | |
| download | bcm5719-llvm-b79ecec20d564a60c9ff8f4ac5994594e96701ea.tar.gz bcm5719-llvm-b79ecec20d564a60c9ff8f4ac5994594e96701ea.zip | |
[mips] Fix predicates of mfc1, mtc1 instructions
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D46692
llvm-svn: 332339
Diffstat (limited to 'llvm/test/MC/Mips')
| -rw-r--r-- | llvm/test/MC/Mips/micromips-fpu-instructions.s | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/micromips-fpu-instructions.s b/llvm/test/MC/Mips/micromips-fpu-instructions.s index d9350b602e8..4cf4de4a787 100644 --- a/llvm/test/MC/Mips/micromips-fpu-instructions.s +++ b/llvm/test/MC/Mips/micromips-fpu-instructions.s @@ -62,9 +62,13 @@ # CHECK-EL: cfc1 $6, $0 # encoding: [0xc0,0x54,0x3b,0x10] # CHECK-EL: ctc1 $6, $0 # encoding: [0xc0,0x54,0x3b,0x18] # CHECK-EL: mfc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x20] +# CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} MFC1_MM # CHECK-EL: mtc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x28] +# CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} MTC1_MM # CHECK-EL: mfhc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x30] +# CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} MFHC1_D32_MM # CHECK-EL: mthc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x38] +# CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} MTHC1_D32_MM # CHECK-EL: movz.s $f4, $f6, $7 # encoding: [0xe6,0x54,0x78,0x20] # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} MOVZ_I_S_MM # CHECK-EL: movz.d $f4, $f6, $7 # encoding: [0xe6,0x54,0x78,0x21] @@ -145,9 +149,13 @@ # CHECK-EB: cfc1 $6, $0 # encoding: [0x54,0xc0,0x10,0x3b] # CHECK-EB: ctc1 $6, $0 # encoding: [0x54,0xc0,0x18,0x3b] # CHECK-EB: mfc1 $6, $f8 # encoding: [0x54,0xc8,0x20,0x3b] +# CHECK-EB-NEXT: # <MCInst #{{[0-9]+}} MFC1_MM # CHECK-EB: mtc1 $6, $f8 # encoding: [0x54,0xc8,0x28,0x3b] +# CHECK-EB-NEXT: # <MCInst #{{[0-9]+}} MTC1_MM # CHECK-EB: mfhc1 $6, $f8 # encoding: [0x54,0xc8,0x30,0x3b] +# CHECK-EB-NEXT: # <MCInst #{{[0-9]+}} MFHC1_D32_MM # CHECK-EB: mthc1 $6, $f8 # encoding: [0x54,0xc8,0x38,0x3b] +# CHECK-EB-NEXT: # <MCInst #{{[0-9]+}} MTHC1_D32_MM # CHECK-EB: movz.s $f4, $f6, $7 # encoding: [0x54,0xe6,0x20,0x78] # CHECK-EB-NEXT: # <MCInst #{{[0-9]+}} MOVZ_I_S_MM # CHECK-EB: movz.d $f4, $f6, $7 # encoding: [0x54,0xe6,0x21,0x78] |
