diff options
| author | Simon Dardis <simon.dardis@mips.com> | 2018-05-22 10:55:05 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@mips.com> | 2018-05-22 10:55:05 +0000 |
| commit | 437153bb8022f55c0574760400407e449aeb1dd0 (patch) | |
| tree | b9d38240a9da9cc72866e5e350de42f3cc382397 /llvm/test/MC/Mips | |
| parent | 4162d77744b2e181f2db619b76fc112b59c2ef13 (diff) | |
| download | bcm5719-llvm-437153bb8022f55c0574760400407e449aeb1dd0.tar.gz bcm5719-llvm-437153bb8022f55c0574760400407e449aeb1dd0.zip | |
[mips] Correct the predicates of the cache and pref instructions
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D46949
llvm-svn: 332970
Diffstat (limited to 'llvm/test/MC/Mips')
| -rw-r--r-- | llvm/test/MC/Mips/micromips/valid.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/micromips32r6/valid.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/mips32r6/valid.s | 2 |
3 files changed, 6 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/micromips/valid.s b/llvm/test/MC/Mips/micromips/valid.s index 654c21bd3a1..86aa41cacad 100644 --- a/llvm/test/MC/Mips/micromips/valid.s +++ b/llvm/test/MC/Mips/micromips/valid.s @@ -187,7 +187,9 @@ tlti $9, 17767 # CHECK: tlti $9, 17767 # encoding: [0x41,0x tltiu $9, 17767 # CHECK: tltiu $9, 17767 # encoding: [0x41,0x49,0x45,0x67] tnei $9, 17767 # CHECK: tnei $9, 17767 # encoding: [0x41,0x89,0x45,0x67] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0x20,0x25,0x60,0x08] + # CHECK-NEXT: # <MCInst #{{.*}} CACHE_MM pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x60,0x25,0x20,0x08] + # CHECK-NEXT: # <MCInst #{{.*}} PREF_MM ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x08,0x00] ehb # CHECK: ehb # encoding: [0x00,0x00,0x18,0x00] pause # CHECK: pause # encoding: [0x00,0x00,0x28,0x00] diff --git a/llvm/test/MC/Mips/micromips32r6/valid.s b/llvm/test/MC/Mips/micromips32r6/valid.s index 74efdab0296..e799e90625e 100644 --- a/llvm/test/MC/Mips/micromips32r6/valid.s +++ b/llvm/test/MC/Mips/micromips32r6/valid.s @@ -46,6 +46,7 @@ break 7 # CHECK: break 7 # encoding: [0x00,0x07,0x00,0x07] break 7, 5 # CHECK: break 7, 5 # encoding: [0x00,0x07,0x01,0x47] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0x20,0x25,0x60,0x08] + # CHECK-NEXT: # <MCInst #{{.*}} CACHE_MMR6 clo $11, $a1 # CHECK: clo $11, $5 # encoding: [0x01,0x65,0x4b,0x3c] clz $sp, $gp # CHECK: clz $sp, $gp # encoding: [0x03,0x80,0xe8,0x50] div $3, $4, $5 # CHECK: div $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x18] @@ -113,6 +114,7 @@ or $3, $4, $5 # CHECK: or $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0x90] ori $3, $4, 1234 # CHECK: ori $3, $4, 1234 # encoding: [0x50,0x64,0x04,0xd2] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x60,0x25,0x20,0x08] + # CHECK-NEXT: # <MCInst #{{.*}} PREF_MMR6 sb16 $3, 4($16) # CHECK: sb16 $3, 4($16) # encoding: [0x89,0x84] seb $3, $4 # CHECK: seb $3, $4 # encoding: [0x00,0x64,0x2b,0x3c] seb $3 # CHECK: seb $3, $3 # encoding: [0x00,0x63,0x2b,0x3c] diff --git a/llvm/test/MC/Mips/mips32r6/valid.s b/llvm/test/MC/Mips/mips32r6/valid.s index 343330e72cd..e60b5fad371 100644 --- a/llvm/test/MC/Mips/mips32r6/valid.s +++ b/llvm/test/MC/Mips/mips32r6/valid.s @@ -66,6 +66,7 @@ a: bovc $2, $0, 4 # CHECK: bovc $2, $zero, 4 # encoding: [0x20,0x40,0x00,0x01] bovc $2, $4, 4 # CHECK: bovc $2, $4, 4 # encoding: [0x20,0x82,0x00,0x01] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0x7c,0xa1,0x04,0x25] + # CHECK-NEXT: # <MCInst #{{.*}} CACHE_R6 ceil.w.d $f11,$f24 # CHECK: ceil.w.d $f11, $f24 # encoding: [0x46,0x20,0xc2,0xce] # CHECK: # <MCInst #{{.*}} CEIL_W_D64 ceil.w.s $f6,$f20 # CHECK: ceil.w.s $f6, $f20 # encoding: [0x46,0x00,0xa1,0x8e] @@ -152,6 +153,7 @@ a: # CHECK-NEXT: # <MCInst #{{[0-9]+}} PAUSE # CHECK-NOT # <MCInst #{{[0-9}+}} PAUSE_MM pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x7c,0xa1,0x04,0x35] + # CHECK-NEXT: # <MCInst #{{.*}} PREF_R6 # FIXME: Use the code generator in order to print the .set directives # instead of the instruction printer. rdhwr $sp,$11 # CHECK: .set push |
