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authorSimon Atanasyan <simon@atanasyan.com>2018-04-24 16:14:00 +0000
committerSimon Atanasyan <simon@atanasyan.com>2018-04-24 16:14:00 +0000
commit9df3be3ccb175beb960d7c8456c89c8d94c4ff2d (patch)
treeb3cd6ddb5fcd4d1c1d1dfa2cd74f3f74e451dae9 /llvm/test/MC/Mips/mips64r3/invalid.s
parent510af48e5d6089adb105afcc7c4521b0509143d6 (diff)
downloadbcm5719-llvm-9df3be3ccb175beb960d7c8456c89c8d94c4ff2d.tar.gz
bcm5719-llvm-9df3be3ccb175beb960d7c8456c89c8d94c4ff2d.zip
[mips] Show an error if register number is out of range
Current code does not check that a register number is in the 0-31 range. Sometimes the parser checks that later for some kinds of instructions, but that leads to unclear / incorrect error messages like that: % cat test.s .text lb $4, 8($32) % llvm-mc test.s -triple=mips64-unknown-linux test.s:2:10: error: expected memory with 16-bit signed offset lb $4, 8($32) ^ Sometimes the parser just crashes: % cat test.s .text lw $4, 8($32) % llvm-mc test.s -triple=mips64-unknown-linux This patch resolves the problem by checking that register number after '$' sign is in the 0-31 range. If the number is out of the range the parser shows the `invalid register number` error, but treats invalid register number as a normal one to continue parsing and catch other possible errors. Differential Revision: https://reviews.llvm.org/D45919 llvm-svn: 330732
Diffstat (limited to 'llvm/test/MC/Mips/mips64r3/invalid.s')
-rw-r--r--llvm/test/MC/Mips/mips64r3/invalid.s2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/MC/Mips/mips64r3/invalid.s b/llvm/test/MC/Mips/mips64r3/invalid.s
index 16083738873..1819edf31b2 100644
--- a/llvm/test/MC/Mips/mips64r3/invalid.s
+++ b/llvm/test/MC/Mips/mips64r3/invalid.s
@@ -14,4 +14,4 @@
jalr.hb $31, $31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
pref -1, 255($7) # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
pref 32, 255($7) # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
- sd $32, 65536($32) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+ sd $32, 65536($32) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
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