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authorToma Tabacu <toma.tabacu@imgtec.com>2015-04-08 10:06:45 +0000
committerToma Tabacu <toma.tabacu@imgtec.com>2015-04-08 10:06:45 +0000
commit7567a10c47940b950b3c33d2377262a62487e874 (patch)
treeabd367bee2c0c4b51deefdfc408db8ef320c35e8 /llvm/test/MC/Mips/mips4
parentd42488a637a0a9851dbc0ebfbb1e1fc20660326a (diff)
downloadbcm5719-llvm-7567a10c47940b950b3c33d2377262a62487e874.tar.gz
bcm5719-llvm-7567a10c47940b950b3c33d2377262a62487e874.zip
[mips] [IAS] Remove AssemblerPredicate's from RelocPIC and RelocStatic.
Summary: These AssemblerPredicate's are unnecessary and actually make some instructions unusable when assembling pre-MIPS32 ISAs. For example, this was causing the IAS to reject the 'j' instruction for MIPS I-V. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8300 llvm-svn: 234398
Diffstat (limited to 'llvm/test/MC/Mips/mips4')
-rw-r--r--llvm/test/MC/Mips/mips4/valid.s9
1 files changed, 8 insertions, 1 deletions
diff --git a/llvm/test/MC/Mips/mips4/valid.s b/llvm/test/MC/Mips/mips4/valid.s
index 7fcf781713d..a23990c94dd 100644
--- a/llvm/test/MC/Mips/mips4/valid.s
+++ b/llvm/test/MC/Mips/mips4/valid.s
@@ -1,7 +1,7 @@
# Instructions that are valid
#
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 | FileCheck %s
-
+a:
.set noat
abs.d $f7,$f25 # CHECK: encoding:
abs.s $f9,$f16
@@ -113,6 +113,11 @@
floor.l.s $f12,$f5
floor.w.d $f14,$f11
floor.w.s $f8,$f9
+ j 1f # CHECK: j $tmp0 # encoding: [0b000010AA,A,A,A]
+ # CHECK: # fixup A - offset: 0, value: ($tmp0), kind: fixup_Mips_26
+ j a # CHECK: j a # encoding: [0b000010AA,A,A,A]
+ # CHECK: # fixup A - offset: 0, value: a, kind: fixup_Mips_26
+ j 1328 # CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c]
lb $24,-14515($10)
lbu $8,30195($v1)
ld $sp,-28645($s1)
@@ -258,3 +263,5 @@
trunc.w.s $f28,$f30
xor $s2,$a0,$s8
xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04]
+
+1:
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