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| author | Richard Osborne <richard@xmos.com> | 2013-01-20 17:22:43 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2013-01-20 17:22:43 +0000 |
| commit | f063fcee7ab62151c021cfe4b6fec233c79b77d2 (patch) | |
| tree | 5f8252d5830582574a66438346a81c8b1b180f5a /llvm/test/MC/Disassembler/XCore | |
| parent | 3fb73952330816a4e551c7b66731f54ddfb9b5a4 (diff) | |
| download | bcm5719-llvm-f063fcee7ab62151c021cfe4b6fec233c79b77d2.tar.gz bcm5719-llvm-f063fcee7ab62151c021cfe4b6fec233c79b77d2.zip | |
Add instruction encodings / disassembler support for 2rus instructions.
llvm-svn: 172985
Diffstat (limited to 'llvm/test/MC/Disassembler/XCore')
| -rw-r--r-- | llvm/test/MC/Disassembler/XCore/xcore.txt | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/XCore/xcore.txt b/llvm/test/MC/Disassembler/XCore/xcore.txt index b022f502313..5b7b3753842 100644 --- a/llvm/test/MC/Disassembler/XCore/xcore.txt +++ b/llvm/test/MC/Disassembler/XCore/xcore.txt @@ -234,3 +234,26 @@ # CHECK: sub r4, r2, r5 0x89 0x1a + +# 2rus instructions + +# CHECK: add r10, r2, 5 +0xe9 0x92 + +# CHECK: eq r2, r1, 0 +0x24 0xb0 + +# CHECK: ldw r5, r6[1] +0x19 0x09 + +# CHECK: shl r6, r5, 24 +0xa6 0xa5 + +# CHECK: shr r3, r8, 5 +0xf1 0xab + +# CHECK: stw r3, r2[0] +0x38 0x00 + +# CHECK: sub r2, r4, 11 +0x63 0x9d |
