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authorRichard Osborne <richard@xmos.com>2012-12-17 13:50:04 +0000
committerRichard Osborne <richard@xmos.com>2012-12-17 13:50:04 +0000
commit041071c55882541e31bd50d9e6bd1212dc59c383 (patch)
treee79e7a25a45b1f5fdd2f19de5b2e1a930cfc7b93 /llvm/test/MC/Disassembler/XCore
parentec339f70d6e1166be4936383d839f06271d6e18e (diff)
downloadbcm5719-llvm-041071c55882541e31bd50d9e6bd1212dc59c383.tar.gz
bcm5719-llvm-041071c55882541e31bd50d9e6bd1212dc59c383.zip
Add instruction encodings / disassembly support for rus instructions.
llvm-svn: 170330
Diffstat (limited to 'llvm/test/MC/Disassembler/XCore')
-rw-r--r--llvm/test/MC/Disassembler/XCore/xcore.txt20
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/XCore/xcore.txt b/llvm/test/MC/Disassembler/XCore/xcore.txt
index 44c870accf6..a959a8928aa 100644
--- a/llvm/test/MC/Disassembler/XCore/xcore.txt
+++ b/llvm/test/MC/Disassembler/XCore/xcore.txt
@@ -138,3 +138,23 @@
# CHECK: sext r9, r1
0x45 0x37
+
+# rus instructions
+
+# CHECK: chkct res[r1], 8
+0x34 0xcf
+
+# CHECK: getr r11, 2
+0x4e 0x87
+
+# CHECK: mkmsk r4, 24
+0x72 0xa7
+
+# CHECK: outct res[r3], r0
+0xcc 0x4e
+
+# CHECK: sext r8, 16
+0xb1 0x37
+
+# CHECK: zext r2, 32
+0xd8 0x46
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