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| author | Craig Topper <craig.topper@gmail.com> | 2011-10-02 21:08:12 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-10-02 21:08:12 +0000 |
| commit | 7aea69d9490dc6a07ed3165982ff38a7a8077cb2 (patch) | |
| tree | 2698917b076c81c06713fadbc6a70cf8b97c6427 /llvm/test/MC/Disassembler/X86/intel-syntax.txt | |
| parent | 7de05027a56b80c5a9a3e5bfffb6431384e527e3 (diff) | |
| download | bcm5719-llvm-7aea69d9490dc6a07ed3165982ff38a7a8077cb2.tar.gz bcm5719-llvm-7aea69d9490dc6a07ed3165982ff38a7a8077cb2.zip | |
Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST.
llvm-svn: 140974
Diffstat (limited to 'llvm/test/MC/Disassembler/X86/intel-syntax.txt')
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/intel-syntax.txt | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/X86/intel-syntax.txt b/llvm/test/MC/Disassembler/X86/intel-syntax.txt index c04dcd099ba..54b242d7b2e 100644 --- a/llvm/test/MC/Disassembler/X86/intel-syntax.txt +++ b/llvm/test/MC/Disassembler/X86/intel-syntax.txt @@ -20,3 +20,60 @@ # CHECK: in AL, DX 0xec + +# CHECK: nop +0x90 + +# CHECK: xchg EAX, R8D +0x41 0x90 + +# CHECK: xchg RAX, R8 +0x49 0x90 + +# CHECK: add AL, 0 +0x04 0x00 + +# CHECK: add AX, 0 +0x66 0x05 0x00 0x00 + +# CHECK: add EAX, 0 +0x05 0x00 0x00 0x00 0x00 + +# CHECK: add RAX, 0 +0x48 0x05 0x00 0x00 0x00 0x00 + +# CHECK: adc AL, 0 +0x14 0x00 + +# CHECK: adc AX, 0 +0x66 0x15 0x00 0x00 + +# CHECK: adc EAX, 0 +0x15 0x00 0x00 0x00 0x00 + +# CHECK: adc RAX, 0 +0x48 0x15 0x00 0x00 0x00 0x00 + +# CHECK: cmp AL, 0 +0x3c 0x00 + +# CHECK: cmp AX, 0 +0x66 0x3d 0x00 0x00 + +# CHECK: cmp EAX, 0 +0x3d 0x00 0x00 0x00 0x00 + +# CHECK: cmp RAX, 0 +0x48 0x3d 0x00 0x00 0x00 0x00 + +# CHECK: test AL, 0 +0xa8 0x00 + +# CHECK: test AX, 0 +0x66 0xa9 0x00 0x00 + +# CHECK: test EAX, 0 +0xa9 0x00 0x00 0x00 0x00 + +# CHECK: test RAX, 0 +0x48 0xa9 0x00 0x00 0x00 0x00 |
