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| author | Marcin Koscielnicki <koriakin@0x04.net> | 2016-06-29 07:29:07 +0000 |
|---|---|---|
| committer | Marcin Koscielnicki <koriakin@0x04.net> | 2016-06-29 07:29:07 +0000 |
| commit | 518cbc7cc3ac8fbaf45073a3d2ed1379c2e356ee (patch) | |
| tree | 3f7b181840befadd2f6fc53dfe3422327a27792b /llvm/test/MC/Disassembler/SystemZ | |
| parent | 60976ba86dae6a9a60d5b0c13ca884573ec1ae3a (diff) | |
| download | bcm5719-llvm-518cbc7cc3ac8fbaf45073a3d2ed1379c2e356ee.tar.gz bcm5719-llvm-518cbc7cc3ac8fbaf45073a3d2ed1379c2e356ee.zip | |
[SystemZ] Add floating-point test data class instructions.
These are not used by CodeGen yet - ISD combiners creating the new node
will come in subsequent patches.
llvm-svn: 274108
Diffstat (limited to 'llvm/test/MC/Disassembler/SystemZ')
| -rw-r--r-- | llvm/test/MC/Disassembler/SystemZ/insns.txt | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/SystemZ/insns.txt b/llvm/test/MC/Disassembler/SystemZ/insns.txt index 1e7b00e4855..29c1ece1cb4 100644 --- a/llvm/test/MC/Disassembler/SystemZ/insns.txt +++ b/llvm/test/MC/Disassembler/SystemZ/insns.txt @@ -9040,6 +9040,69 @@ # CHECK: tbeginc 4095(%r15), 42 0xe5 0x61 0xff 0xff 0x00 0x2a +# CHECK: tcdb %f0, 0 +0xed 0x00 0x00 0x00 0x00 0x11 + +# CHECK: tcdb %f0, 4095 +0xed 0x00 0x0f 0xff 0x00 0x11 + +# CHECK: tcdb %f0, 0(%r1) +0xed 0x00 0x10 0x00 0x00 0x11 + +# CHECK: tcdb %f0, 0(%r15) +0xed 0x00 0xf0 0x00 0x00 0x11 + +# CHECK: tcdb %f0, 4095(%r1,%r15) +0xed 0x01 0xff 0xff 0x00 0x11 + +# CHECK: tcdb %f0, 4095(%r15,%r1) +0xed 0x0f 0x1f 0xff 0x00 0x11 + +# CHECK: tcdb %f15, 0 +0xed 0xf0 0x00 0x00 0x00 0x11 + +# CHECK: tceb %f0, 0 +0xed 0x00 0x00 0x00 0x00 0x10 + +# CHECK: tceb %f0, 4095 +0xed 0x00 0x0f 0xff 0x00 0x10 + +# CHECK: tceb %f0, 0(%r1) +0xed 0x00 0x10 0x00 0x00 0x10 + +# CHECK: tceb %f0, 0(%r15) +0xed 0x00 0xf0 0x00 0x00 0x10 + +# CHECK: tceb %f0, 4095(%r1,%r15) +0xed 0x01 0xff 0xff 0x00 0x10 + +# CHECK: tceb %f0, 4095(%r15,%r1) +0xed 0x0f 0x1f 0xff 0x00 0x10 + +# CHECK: tceb %f15, 0 +0xed 0xf0 0x00 0x00 0x00 0x10 + +# CHECK: tcxb %f0, 0 +0xed 0x00 0x00 0x00 0x00 0x12 + +# CHECK: tcxb %f0, 4095 +0xed 0x00 0x0f 0xff 0x00 0x12 + +# CHECK: tcxb %f0, 0(%r1) +0xed 0x00 0x10 0x00 0x00 0x12 + +# CHECK: tcxb %f0, 0(%r15) +0xed 0x00 0xf0 0x00 0x00 0x12 + +# CHECK: tcxb %f0, 4095(%r1,%r15) +0xed 0x01 0xff 0xff 0x00 0x12 + +# CHECK: tcxb %f0, 4095(%r15,%r1) +0xed 0x0f 0x1f 0xff 0x00 0x12 + +# CHECK: tcxb %f13, 0 +0xed 0xd0 0x00 0x00 0x00 0x12 + # CHECK: tend 0xb2 0xf8 0x00 0x00 |
