[mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.

Summary:
Previously it (incorrectly) used GPR's.

Patch by Simon Dardis. A couple small corrections by myself.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10567

llvm-svn: 240883

26 files changed, 98 insertions, 0 deletions

diff --git a/llvm/test/MC/Disassembler/Mips/mips32.txt b/llvm/test/MC/Disassembler/Mips/mips32.txt
index bd4ae4daad0..b9360ea9c8b 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32.txt
@@ -255,6 +255,9 @@
 # CHECK: maddu  $6,  $7
 0x70 0xc7 0x00 0x01
 
+# CHECK: mfc0 $8, $16, 4
+0x40 0x08 0x80 0x04
+
 # CHECK: mfc1   $6, $f7
 0x44 0x06 0x38 0x00
 
@@ -294,6 +297,9 @@
 # CHECK: msubu  $6,  $7
 0x70 0xc7 0x00 0x05
 
+# CHECK: mtc0 $9, $15, 1
+0x40 0x89 0x78 0x01
+
 # CHECK: mtc1   $6, $f7
 0x44 0x86 0x38 0x00
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
index ea209d1ebab..f2299732a80 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
@@ -86,6 +86,7 @@
 0x10 0x00 0xa3 0x98 # CHECK: lwr $3, 16($5)
 0x00 0x00 0xc7 0x70 # CHECK: madd $6, $7
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x12 0x28 0x00 0x00 # CHECK: mflo $5
@@ -93,6 +94,7 @@
 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7
 0x13 0x00 0xe0 0x00 # CHECK: mtlo $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
index 45b672b2d35..389256ce5b5 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
@@ -86,6 +86,7 @@
 0x98 0xa3 0x00 0x10 # CHECK: lwr $3, 16($5)
 0x70 0xc7 0x00 0x00 # CHECK: madd $6, $7
 0x70 0xc7 0x00 0x01 # CHECK: maddu $6, $7
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7
 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
 0x00 0x00 0x28 0x12 # CHECK: mflo $5
@@ -93,6 +94,7 @@
 0x46 0x00 0x39 0x86 # CHECK: mov.s $f6, $f7
 0x70 0xc7 0x00 0x04 # CHECK: msub $6, $7
 0x70 0xc7 0x00 0x05 # CHECK: msubu $6, $7
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7
 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
 0x00 0xe0 0x00 0x13 # CHECK: mtlo $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips32_le.txt b/llvm/test/MC/Disassembler/Mips/mips32_le.txt
index 533fc69598c..c019c41bd12 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32_le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32_le.txt
@@ -254,6 +254,9 @@
 # CHECK: maddu  $6,  $7
 0x01 0x00 0xc7 0x70
 
+# CHECK: mfc0 $8, $16, 4
+0x04 0x80 0x08 0x40
+
 # CHECK: mfc1   $6, $f7
 0x00 0x38 0x06 0x44
 
@@ -299,6 +302,9 @@
 # CHECK: msubu  $6,  $7
 0x05 0x00 0xc7 0x70
 
+# CHECK: mtc0 $9, $15, 1
+0x01 0x78 0x89 0x40
+
 # CHECK: mtc1   $6, $f7
 0x00 0x38 0x86 0x44
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2.txt b/llvm/test/MC/Disassembler/Mips/mips32r2.txt
index 354ef74a75a..c553c03a2cf 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2.txt
@@ -269,6 +269,9 @@
 # CHECK: maddu  $6,  $7
 0x70 0xc7 0x00 0x01
 
+# CHECK: mfc0 $8, $16, 4
+0x40 0x08 0x80 0x04
+
 # CHECK: mfc1   $6, $f7
 0x44 0x06 0x38 0x00
 
@@ -290,6 +293,9 @@
 # CHECK: msubu  $6,  $7
 0x70 0xc7 0x00 0x05
 
+# CHECK: mtc0 $9, $15, 1
+0x40 0x89 0x78 0x01
+
 # CHECK: mtc1   $6, $f7
 0x44 0x86 0x38 0x00
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-le.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-le.txt
index d0eb13c5afd..c487b6d0e96 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-le.txt
@@ -101,6 +101,7 @@
 0xa1 0xd4 0x94 0x4e # CHECK: madd.d $f18, $f20, $f26, $f20
 0x60 0x98 0xf9 0x4f # CHECK: madd.s $f1, $f31, $f19, $f25
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
@@ -111,6 +112,7 @@
 0xa9 0xf2 0x52 0x4c # CHECK: msub.d $f10, $f2, $f30, $f18
 0x28 0x53 0x70 0x4e # CHECK: msub.s $f12, $f19, $f10, $f16
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7
 0x00 0x80 0xe0 0x44 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
index 96378357d19..f05b89a8af4 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
@@ -101,6 +101,7 @@
 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
 0x70 0xc7 0x00 0x01 # CHECK: maddu $6, $7
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7
 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
 0x44 0x7e 0xc0 0x00 # CHECK: mfhc1 $fp, $f24
@@ -111,6 +112,7 @@
 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18
 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16
 0x70 0xc7 0x00 0x05 # CHECK: msubu $6, $7
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7
 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
 0x44 0xe0 0x80 0x00 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt b/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt
index 81a05b330fd..faaed7cb345 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt
@@ -269,6 +269,9 @@
 # CHECK: maddu  $6,  $7
 0x01 0x00 0xc7 0x70
 
+# CHECK: mfc0 $8, $16, 4
+0x04 0x80 0x08 0x40
+
 # CHECK: mfc1   $6, $f7
 0x00 0x38 0x06 0x44
 
@@ -290,6 +293,9 @@
 # CHECK: msubu  $6,  $7
 0x05 0x00 0xc7 0x70
 
+# CHECK: mtc0 $9, $15, 1
+0x01 0x78 0x89 0x40
+
 # CHECK: mtc1   $6, $f7
 0x00 0x38 0x86 0x44
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3-le.txt b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3-le.txt
index 1909e2a2127..37c14de4cb6 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3-le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3-le.txt
@@ -98,6 +98,7 @@
 0xa1 0xd4 0x94 0x4e # CHECK: madd.d $f18, $f20, $f26, $f20
 0x60 0x98 0xf9 0x4f # CHECK: madd.s $f1, $f31, $f19, $f25
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
@@ -108,6 +109,7 @@
 0xa9 0xf2 0x52 0x4c # CHECK: msub.d $f10, $f2, $f30, $f18
 0x28 0x53 0x70 0x4e # CHECK: msub.s $f12, $f19, $f10, $f16
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7
 0x00 0x80 0xe0 0x44 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3.txt b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3.txt
index a273c24f9c9..2592ae07511 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3.txt
@@ -98,6 +98,7 @@
 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
 0x70 0xc7 0x00 0x01 # CHECK: maddu $6, $7
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7
 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
 0x44 0x7e 0xc0 0x00 # CHECK: mfhc1 $fp, $f24
@@ -108,6 +109,7 @@
 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18
 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16
 0x70 0xc7 0x00 0x05 # CHECK: msubu $6, $7
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7
 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
 0x44 0xe0 0x80 0x00 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5-le.txt b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5-le.txt
index 62977dc3266..b68089b0a07 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5-le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5-le.txt
@@ -98,6 +98,7 @@
 0xa1 0xd4 0x94 0x4e # CHECK: madd.d $f18, $f20, $f26, $f20
 0x60 0x98 0xf9 0x4f # CHECK: madd.s $f1, $f31, $f19, $f25
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
@@ -108,6 +109,7 @@
 0xa9 0xf2 0x52 0x4c # CHECK: msub.d $f10, $f2, $f30, $f18
 0x28 0x53 0x70 0x4e # CHECK: msub.s $f12, $f19, $f10, $f16
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7
 0x00 0x80 0xe0 0x44 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5.txt b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5.txt
index 39c46440946..e21d8e8ac79 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5.txt
@@ -98,6 +98,7 @@
 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
 0x70 0xc7 0x00 0x01 # CHECK: maddu $6, $7
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7
 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
 0x44 0x7e 0xc0 0x00 # CHECK: mfhc1 $fp, $f24
@@ -108,6 +109,7 @@
 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18
 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16
 0x70 0xc7 0x00 0x05 # CHECK: msubu $6, $7
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7
 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
 0x44 0xe0 0x80 0x00 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r6.txt b/llvm/test/MC/Disassembler/Mips/mips32r6.txt
index afef8ada152..12dc7321922 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r6.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r6.txt
@@ -88,8 +88,10 @@
 # 0xd8 0x05 0x01 0x00 # CHECK-TODO: jic $5, 256
 0xec 0x48 0x00 0x43 # CHECK: lwpc $2, 268
 0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268
+0x40 0x08 0x80 0x03 # CHECK: mfc0 $8, $16, 3
 0x00 0x64 0x10 0xda # CHECK: mod $2, $3, $4
 0x00 0x64 0x10 0xdb # CHECK: modu $2, $3, $4
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x00 0x64 0x10 0x98 # CHECK: mul $2, $3, $4
 0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4
 0x00 0x64 0x10 0x99 # CHECK: mulu $2, $3, $4
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
index c10d16699b7..94dc3a2645d 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
@@ -83,6 +83,7 @@
 0xc5 0x10 0x64 0x00 # CHECK: lsa $2, $3, $4, 3
 0x43 0x00 0x48 0xec # CHECK: lwpc $2, 268
 0x43 0x00 0x50 0xec # CHECK: lwupc $2, 268
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0xda 0x10 0x64 0x00 # CHECK: mod $2, $3, $4
 0xdb 0x10 0x64 0x00 # CHECK: modu $2, $3, $4
 0x98 0x10 0x64 0x00 # CHECK: mul $2, $3, $4
@@ -93,6 +94,7 @@
 0x98 0x18 0x24 0x46 # CHECK: maddf.d $f2, $f3, $f4
 0x99 0x18 0x04 0x46 # CHECK: msubf.s $f2, $f3, $f4
 0x99 0x18 0x24 0x46 # CHECK: msubf.d $f2, $f3, $f4
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x10 0x08 0x22 0x46 # CHECK: sel.d $f0, $f1, $f2
 0x10 0x08 0x02 0x46 # CHECK: sel.s $f0, $f1, $f2
 0x35 0x10 0x64 0x00 # CHECK: seleqz $2, $3, $4
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
index 0b78003420b..2b71338f0bb 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
@@ -83,6 +83,8 @@
 0x00 0x64 0x10 0xc5 # CHECK: lsa $2, $3, $4, 3
 0xec 0x48 0x00 0x43 # CHECK: lwpc $2, 268
 0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x00 0x64 0x10 0xda # CHECK: mod $2, $3, $4
 0x00 0x64 0x10 0xdb # CHECK: modu $2, $3, $4
 0x00 0x64 0x10 0x98 # CHECK: mul $2, $3, $4
diff --git a/llvm/test/MC/Disassembler/Mips/mips64.txt b/llvm/test/MC/Disassembler/Mips/mips64.txt
index d494df6f9c2..c3abaf4cf47 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64.txt
@@ -14,9 +14,15 @@
 # CHECK: ddivu $zero, $9, $24
 0x01 0x38 0x00 0x1f
 
+# CHECK: dmfc0 $24, $10, 0
+0x40 0x38 0x50 0x00
+
 # CHECK: dmfc1 $2, $f14
 0x44 0x22 0x70 0x00
 
+# CHECK: dmtc0 $4, $10, 0
+0x40 0xa4 0x50 0x00
+
 # CHECK: dmtc1 $23, $f5
 0x44 0xb7 0x28 0x00
 
@@ -47,6 +53,12 @@
 # CHECK: dsubu $gp, $27, $24
 0x03 0x78 0xe0 0x2f
 
+# CHECK: mfc0 $8, $16, 4
+0x40 0x08 0x80 0x04
+
+# CHECK: mtc0 $9, $15, 1
+0x40 0x89 0x78 0x01
+
 # CHECK: lw $27, -15155($1)
 0x8c 0x3b 0xc4 0xcd
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
index 698ebfb3479..2d52216fdda 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
@@ -82,7 +82,9 @@
 0x24 0x80 0x30 0x73 # CHECK: dclz $16, $25
 0x1e 0x00 0x53 0x03 # CHECK: ddiv $zero, $26, $19
 0x1f 0x00 0x11 0x02 # CHECK: ddivu $zero, $16, $17
+0x00 0x50 0x38 0x40 # CHECK: dmfc0 $24, $10, 0
 0x00 0x68 0x2c 0x44 # CHECK: dmfc1 $12, $f13
+0x00 0x50 0xa4 0x40 # CHECK: dmtc0 $4, $10, 0
 0x00 0x70 0xb0 0x44 # CHECK: dmtc1 $16, $f14
 0x1c 0x00 0xe9 0x02 # CHECK: dmult $23, $9
 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
@@ -142,6 +144,7 @@
 0x10 0x00 0xa3 0x98 # CHECK: lwr $3, 16($5)
 0x00 0x00 0xc7 0x70 # CHECK: madd $6, $7
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x12 0x28 0x00 0x00 # CHECK: mflo $5
@@ -149,6 +152,7 @@
 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7
 0x13 0x00 0xe0 0x00 # CHECK: mtlo $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64.txt b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64.txt
index 953e31f9463..1df0ce5a0af 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64.txt
@@ -82,7 +82,9 @@
 0x73 0x30 0x80 0x24 # CHECK: dclz $16, $25
 0x03 0x53 0x00 0x1e # CHECK: ddiv $zero, $26, $19
 0x02 0x11 0x00 0x1f # CHECK: ddivu $zero, $16, $17
+0x40 0x38 0x50 0x00 # CHECK: dmfc0 $24, $10, 0
 0x44 0x2c 0x68 0x00 # CHECK: dmfc1 $12, $f13
+0x40 0xa4 0x50 0x00 # CHECK: dmtc0 $4, $10, 0
 0x44 0xb0 0x70 0x00 # CHECK: dmtc1 $16, $f14
 0x02 0xe9 0x00 0x1c # CHECK: dmult $23, $9
 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
@@ -144,6 +146,7 @@
 0x98 0xa3 0x00 0x10 # CHECK: lwr $3, 16($5)
 0x70 0xc7 0x00 0x00 # CHECK: madd $6, $7
 0x70 0xc7 0x00 0x01 # CHECK: maddu $6, $7
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7
 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
 0x00 0x00 0x28 0x12 # CHECK: mflo $5
@@ -151,6 +154,7 @@
 0x46 0x00 0x39 0x86 # CHECK: mov.s $f6, $f7
 0x70 0xc7 0x00 0x04 # CHECK: msub $6, $7
 0x70 0xc7 0x00 0x05 # CHECK: msubu $6, $7
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7
 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
 0x00 0xe0 0x00 0x13 # CHECK: mtlo $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt
index 6509456b07e..2c6859f27fa 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt
@@ -88,7 +88,9 @@
 0x24 0x80 0x30 0x73 # CHECK: dclz $16, $25
 0x1e 0x00 0x53 0x03 # CHECK: ddiv $zero, $26, $19
 0x1f 0x00 0x11 0x02 # CHECK: ddivu $zero, $16, $17
+0x00 0x50 0x38 0x40 # CHECK: dmfc0 $24, $10, 0
 0x00 0x68 0x2c 0x44 # CHECK: dmfc1 $12, $f13
+0x00 0x50 0xa4 0x40 # CHECK: dmtc0 $4, $10, 0
 0x00 0x70 0xb0 0x44 # CHECK: dmtc1 $16, $f14
 0x1c 0x00 0xe9 0x02 # CHECK: dmult $23, $9
 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
@@ -161,6 +163,7 @@
 0x00 0x00 0xc7 0x70 # CHECK: madd $6, $7
 0x60 0x98 0xf9 0x4f # CHECK: madd.s $f1, $f31, $f19, $f25
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
@@ -170,6 +173,7 @@
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
 0x28 0x53 0x70 0x4e # CHECK: msub.s $f12, $f19, $f10, $f16
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7
 0x00 0x80 0xe0 0x44 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt
index 79fcc769063..b8e46bd36e2 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt
@@ -88,7 +88,9 @@
 0x73 0x30 0x80 0x24 # CHECK: dclz $16, $25
 0x03 0x53 0x00 0x1e # CHECK: ddiv $zero, $26, $19
 0x02 0x11 0x00 0x1f # CHECK: ddivu $zero, $16, $17
+0x40 0x38 0x50 0x00 # CHECK: dmfc0 $24, $10, 0
 0x44 0x2c 0x68 0x00 # CHECK: dmfc1 $12, $f13
+0x40 0xa4 0x50 0x00 # CHECK: dmtc0 $4, $10, 0
 0x44 0xb0 0x70 0x00 # CHECK: dmtc1 $16, $f14
 0x02 0xe9 0x00 0x1c # CHECK: dmult $23, $9
 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
@@ -163,6 +165,7 @@
 0x70 0xc7 0x00 0x00 # CHECK: madd $6, $7
 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
 0x70 0xc7 0x00 0x01 # CHECK: maddu $6, $7
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7
 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
 0x44 0x7e 0xc0 0x00 # CHECK: mfhc1 $fp, $f24
@@ -172,6 +175,7 @@
 0x70 0xc7 0x00 0x04 # CHECK: msub $6, $7
 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16
 0x70 0xc7 0x00 0x05 # CHECK: msubu $6, $7
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7
 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
 0x44 0xe0 0x80 0x00 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
index 52374af2893..88e9c262a0e 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
@@ -85,7 +85,9 @@
 0x24 0x80 0x30 0x73 # CHECK: dclz $16, $25
 0x1e 0x00 0x53 0x03 # CHECK: ddiv $zero, $26, $19
 0x1f 0x00 0x11 0x02 # CHECK: ddivu $zero, $16, $17
+0x00 0x50 0x38 0x40 # CHECK: dmfc0 $24, $10, 0
 0x00 0x68 0x2c 0x44 # CHECK: dmfc1 $12, $f13
+0x00 0x50 0xa4 0x40 # CHECK: dmtc0 $4, $10, 0
 0x00 0x70 0xb0 0x44 # CHECK: dmtc1 $16, $f14
 0x1c 0x00 0xe9 0x02 # CHECK: dmult $23, $9
 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
@@ -158,6 +160,7 @@
 0x00 0x00 0xc7 0x70 # CHECK: madd $6, $7
 0x60 0x98 0xf9 0x4f # CHECK: madd.s $f1, $f31, $f19, $f25
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
@@ -167,6 +170,7 @@
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
 0x28 0x53 0x70 0x4e # CHECK: msub.s $f12, $f19, $f10, $f16
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7
 0x00 0x80 0xe0 0x44 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt
index acd59fc721e..e6e23d68282 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt
@@ -85,7 +85,9 @@
 0x73 0x30 0x80 0x24 # CHECK: dclz $16, $25
 0x03 0x53 0x00 0x1e # CHECK: ddiv $zero, $26, $19
 0x02 0x11 0x00 0x1f # CHECK: ddivu $zero, $16, $17
+0x40 0x38 0x50 0x00 # CHECK: dmfc0 $24, $10, 0
 0x44 0x2c 0x68 0x00 # CHECK: dmfc1 $12, $f13
+0x40 0xa4 0x50 0x00 # CHECK: dmtc0 $4, $10, 0
 0x44 0xb0 0x70 0x00 # CHECK: dmtc1 $16, $f14
 0x02 0xe9 0x00 0x1c # CHECK: dmult $23, $9
 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
@@ -160,6 +162,7 @@
 0x70 0xc7 0x00 0x00 # CHECK: madd $6, $7
 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
 0x70 0xc7 0x00 0x01 # CHECK: maddu $6, $7
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7
 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
 0x44 0x7e 0xc0 0x00 # CHECK: mfhc1 $fp, $f24
@@ -169,6 +172,7 @@
 0x70 0xc7 0x00 0x04 # CHECK: msub $6, $7
 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16
 0x70 0xc7 0x00 0x05 # CHECK: msubu $6, $7
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7
 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
 0x44 0xe0 0x80 0x00 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
index 3d97a2b30ce..bd709d22879 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
@@ -85,7 +85,9 @@
 0x24 0x80 0x30 0x73 # CHECK: dclz $16, $25
 0x1e 0x00 0x53 0x03 # CHECK: ddiv $zero, $26, $19
 0x1f 0x00 0x11 0x02 # CHECK: ddivu $zero, $16, $17
+0x00 0x50 0x38 0x40 # CHECK: dmfc0 $24, $10, 0
 0x00 0x68 0x2c 0x44 # CHECK: dmfc1 $12, $f13
+0x00 0x50 0xa4 0x40 # CHECK: dmtc0 $4, $10, 0
 0x00 0x70 0xb0 0x44 # CHECK: dmtc1 $16, $f14
 0x1c 0x00 0xe9 0x02 # CHECK: dmult $23, $9
 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
@@ -158,6 +160,7 @@
 0x00 0x00 0xc7 0x70 # CHECK: madd $6, $7
 0x60 0x98 0xf9 0x4f # CHECK: madd.s $f1, $f31, $f19, $f25
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
@@ -167,6 +170,7 @@
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
 0x28 0x53 0x70 0x4e # CHECK: msub.s $f12, $f19, $f10, $f16
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7
 0x00 0x80 0xe0 0x44 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt
index ce414edc345..02074d33218 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt
@@ -85,7 +85,9 @@
 0x73 0x30 0x80 0x24 # CHECK: dclz $16, $25
 0x03 0x53 0x00 0x1e # CHECK: ddiv $zero, $26, $19
 0x02 0x11 0x00 0x1f # CHECK: ddivu $zero, $16, $17
+0x40 0x38 0x50 0x00 # CHECK: dmfc0 $24, $10, 0
 0x44 0x2c 0x68 0x00 # CHECK: dmfc1 $12, $f13
+0x40 0xa4 0x50 0x00 # CHECK: dmtc0 $4, $10, 0
 0x44 0xb0 0x70 0x00 # CHECK: dmtc1 $16, $f14
 0x02 0xe9 0x00 0x1c # CHECK: dmult $23, $9
 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
@@ -160,6 +162,7 @@
 0x70 0xc7 0x00 0x00 # CHECK: madd $6, $7
 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
 0x70 0xc7 0x00 0x01 # CHECK: maddu $6, $7
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7
 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
 0x44 0x7e 0xc0 0x00 # CHECK: mfhc1 $fp, $f24
@@ -169,6 +172,7 @@
 0x70 0xc7 0x00 0x04 # CHECK: msub $6, $7
 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16
 0x70 0xc7 0x00 0x05 # CHECK: msubu $6, $7
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7
 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
 0x44 0xe0 0x80 0x00 # CHECK: mthc1 $zero, $f16
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
index 4afd9cc5c4f..157e33593e3 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
@@ -92,8 +92,10 @@
 0x9a 0x10 0x64 0x00 # CHECK: div $2, $3, $4
 0x9b 0x10 0x64 0x00 # CHECK: divu $2, $3, $4
 0xd5 0x10 0x64 0x00 # CHECK: dlsa $2, $3, $4, 3
+0x00 0x50 0x38 0x40 # CHECK: dmfc0 $24, $10, 0
 0xde 0x10 0x64 0x00 # CHECK: dmod $2, $3, $4
 0xdf 0x10 0x64 0x00 # CHECK: dmodu $2, $3, $4
+0x00 0x50 0xa4 0x40 # CHECK: dmtc0 $4, $10, 0
 0xdc 0x10 0x64 0x00 # CHECK: dmuh $2, $3, $4
 0xdd 0x10 0x64 0x00 # CHECK: dmuhu $2, $3, $4
 0x9c 0x10 0x64 0x00 # CHECK: dmul $2, $3, $4
@@ -119,12 +121,14 @@
 0x1d 0x10 0x04 0x46 # CHECK: max.s $f0, $f2, $f4
 0x1f 0x10 0x24 0x46 # CHECK: maxa.d $f0, $f2, $f4
 0x1f 0x10 0x04 0x46 # CHECK: maxa.s $f0, $f2, $f4
+0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x1c 0x10 0x24 0x46 # CHECK: min.d $f0, $f2, $f4
 0x1c 0x10 0x04 0x46 # CHECK: min.s $f0, $f2, $f4
 0x1e 0x10 0x24 0x46 # CHECK: mina.d $f0, $f2, $f4
 0x1e 0x10 0x04 0x46 # CHECK: mina.s $f0, $f2, $f4
 0xda 0x10 0x64 0x00 # CHECK: mod $2, $3, $4
 0xdb 0x10 0x64 0x00 # CHECK: modu $2, $3, $4
+0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x99 0x18 0x24 0x46 # CHECK: msubf.d $f2, $f3, $f4
 0x99 0x18 0x04 0x46 # CHECK: msubf.s $f2, $f3, $f4
 0xd8 0x10 0x64 0x00 # CHECK: muh $2, $3, $4
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
index c41ba990122..91051333880 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
@@ -92,8 +92,10 @@
 0x00 0x64 0x10 0x9a # CHECK: div $2, $3, $4
 0x00 0x64 0x10 0x9b # CHECK: divu $2, $3, $4
 0x00 0x64 0x10 0xd5 # CHECK: dlsa $2, $3, $4, 3
+0x40 0x38 0x50 0x00 # CHECK: dmfc0 $24, $10, 0
 0x00 0x64 0x10 0xde # CHECK: dmod $2, $3, $4
 0x00 0x64 0x10 0xdf # CHECK: dmodu $2, $3, $4
+0x40 0xa4 0x50 0x00 # CHECK: dmtc0 $4, $10, 0
 0x00 0x64 0x10 0xdc # CHECK: dmuh $2, $3, $4
 0x00 0x64 0x10 0xdd # CHECK: dmuhu $2, $3, $4
 0x00 0x64 0x10 0x9c # CHECK: dmul $2, $3, $4
@@ -121,6 +123,7 @@
 0x46 0x04 0x10 0x1d # CHECK: max.s $f0, $f2, $f4
 0x46 0x24 0x10 0x1f # CHECK: maxa.d $f0, $f2, $f4
 0x46 0x04 0x10 0x1f # CHECK: maxa.s $f0, $f2, $f4
+0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x46 0x24 0x10 0x1c # CHECK: min.d $f0, $f2, $f4
 0x46 0x04 0x10 0x1c # CHECK: min.s $f0, $f2, $f4
 0x46 0x24 0x10 0x1e # CHECK: mina.d $f0, $f2, $f4
@@ -129,6 +132,7 @@
 0x00 0x64 0x10 0xdb # CHECK: modu $2, $3, $4
 0x46 0x24 0x18 0x99 # CHECK: msubf.d $f2, $f3, $f4
 0x46 0x04 0x18 0x99 # CHECK: msubf.s $f2, $f3, $f4
+0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
 0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4
 0x00 0x64 0x10 0xd9 # CHECK: muhu $2, $3, $4
 0x00 0x64 0x10 0x98 # CHECK: mul $2, $3, $4