summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/Disassembler/Mips
diff options
context:
space:
mode:
authorZlatko Buljan <Zlatko.Buljan@imgtec.com>2015-11-17 10:11:22 +0000
committerZlatko Buljan <Zlatko.Buljan@imgtec.com>2015-11-17 10:11:22 +0000
commit246b21f66aa454353427d100c208917f32687684 (patch)
tree72df41829c90ced4f7f82bd7482e3e7657aa3167 /llvm/test/MC/Disassembler/Mips
parent9be59af3abe0b3bbee54e46720a75c96723da6cb (diff)
downloadbcm5719-llvm-246b21f66aa454353427d100c208917f32687684.tar.gz
bcm5719-llvm-246b21f66aa454353427d100c208917f32687684.zip
[mips][microMIPS] Implement SUBQ[_S].PH, SUBQ_S.W, SUBQH[_R].PH, SUBQH[_R].W, SUBU[_S].PH, SUBU[_S].QB and SUBUH[_R].QB instructions
Differential Revision: http://reviews.llvm.org/D14114 llvm-svn: 253329
Diffstat (limited to 'llvm/test/MC/Disassembler/Mips')
-rw-r--r--llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt5
-rw-r--r--llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt13
2 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
index c5f90bf0426..4e3a2e0bbc6 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
@@ -46,3 +46,8 @@
0x00 0x64 0x2a 0xf5 # CHECK: shra_r.w $3, $4, 5
0x00 0x64 0xb8 0x7c # CHECK: shrl.qb $3, $4, 5
0x00 0x85 0x1b 0x55 # CHECK: shrlv.qb $3, $4, $5
+0x00 0xa4 0x1a 0x0d # CHECK: subq.ph $3, $4, $5
+0x00 0xa4 0x1e 0x0d # CHECK: subq_s.ph $3, $4, $5
+0x00 0xa4 0x1b 0x45 # CHECK: subq_s.w $3, $4, $5
+0x00 0xa4 0x1a 0xcd # CHECK: subu.qb $3, $4, $5
+0x00 0xa4 0x1e 0xcd # CHECK: subu_s.qb $3, $4, $5
diff --git a/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt
index bf43e286101..2e583f8d5f7 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt
@@ -65,3 +65,16 @@
0x00 0x64 0xb8 0x7c # CHECK: shrl.qb $3, $4, 5
0x00 0x85 0x1b 0x15 # CHECK: shrlv.ph $3, $4, $5
0x00 0x85 0x1b 0x55 # CHECK: shrlv.qb $3, $4, $5
+0x00 0xa4 0x1a 0x0d # CHECK: subq.ph $3, $4, $5
+0x00 0xa4 0x1e 0x0d # CHECK: subq_s.ph $3, $4, $5
+0x00 0xa4 0x1b 0x45 # CHECK: subq_s.w $3, $4, $5
+0x00 0xa4 0x1a 0x4d # CHECK: subqh.ph $3, $4, $5
+0x00 0xa4 0x1e 0x4d # CHECK: subqh_r.ph $3, $4, $5
+0x00 0xa4 0x1a 0x8d # CHECK: subqh.w $3, $4, $5
+0x00 0xa4 0x1e 0x8d # CHECK: subqh_r.w $3, $4, $5
+0x00 0xa4 0x1b 0x0d # CHECK: subu.ph $3, $4, $5
+0x00 0xa4 0x1f 0x0d # CHECK: subu_s.ph $3, $4, $5
+0x00 0xa4 0x1a 0xcd # CHECK: subu.qb $3, $4, $5
+0x00 0xa4 0x1e 0xcd # CHECK: subu_s.qb $3, $4, $5
+0x00 0xa4 0x1b 0x4d # CHECK: subuh.qb $3, $4, $5
+0x00 0xa4 0x1f 0x4d # CHECK: subuh_r.qb $3, $4, $5
OpenPOWER on IntegriCloud