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| author | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2017-06-23 13:33:46 +0000 |
|---|---|---|
| committer | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2017-06-23 13:33:46 +0000 |
| commit | 78811c2c07ee6da9aa4b00ba5a8da2604624264f (patch) | |
| tree | 2b3b33b7bf96e42a198b8399c80d6724bc66d4fd /llvm/test/MC/Disassembler/Mips/mips32r6 | |
| parent | b0871add86c56e554268d8b061db208db51d91e3 (diff) | |
| download | bcm5719-llvm-78811c2c07ee6da9aa4b00ba5a8da2604624264f.tar.gz bcm5719-llvm-78811c2c07ee6da9aa4b00ba5a8da2604624264f.zip | |
Revert r306095: [mips] Fix reg positions in the aui/daui instructions
ELF/mips-plt-r6.s in lld-test is failing. Reverting the change.
Original commit message:
[mips] Fix register positions in the aui/daui instructions
Swapped the position of the rt and rs register in the aut/daui
instructions for mips32r6 and mips64r6. With this change, the format of
the generated instructions complies with specifications and GCC.
Patch by Milos Stojanovic.
llvm-svn: 306099
Diffstat (limited to 'llvm/test/MC/Disassembler/Mips/mips32r6')
| -rw-r--r-- | llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt index 946e8d885bb..30f85c20f80 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt @@ -4,7 +4,7 @@ 0x0a 0x00 0x29 0x25 # CHECK: addiu $9, $9, 10 0xa0 0x22 0x43 0x7c # CHECK: align $4, $2, $3, 2 0x38 0x00 0x7f 0xec # CHECK: aluipc $3, 56 -0xe9 0xff 0x43 0x3c # CHECK: aui $3, $2, 65513 +0xe9 0xff 0x62 0x3c # CHECK: aui $3, $2, 65513 0xff 0xff 0x7e 0xec # CHECK: auipc $3, -1 0x9b 0x14 0x11 0x04 # CHECK: bal 21104 0xb8 0x96 0x37 0xe8 # CHECK: balc 14572260 diff --git a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt index 7d2d62714c1..efc2b401a30 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt @@ -60,7 +60,7 @@ 0x25 0x29 0x00 0x0a # CHECK: addiu $9, $9, 10 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4 0x34 0x42 0x00 0x04 # CHECK: ori $2, $2, 4 -0x3c 0x43 0xff 0xe9 # CHECK: aui $3, $2, 65513 +0x3c 0x62 0xff 0xe9 # CHECK: aui $3, $2, 65513 0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1 0x40 0x08 0x80 0x03 # CHECK: mfc0 $8, $16, 3 0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1 |
