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| author | Silviu Baranga <silviu.baranga@arm.com> | 2012-03-22 14:14:49 +0000 |
|---|---|---|
| committer | Silviu Baranga <silviu.baranga@arm.com> | 2012-03-22 14:14:49 +0000 |
| commit | 4afd7d2316d56e74091089fbd3ee53be86309532 (patch) | |
| tree | 1e839e9996512f3b2737947fe21a592b9a67a113 /llvm/test/MC/Disassembler/ARM/arm-tests.txt | |
| parent | d213f2111a40f58922b5e65de5d2df2c099eb9c0 (diff) | |
| download | bcm5719-llvm-4afd7d2316d56e74091089fbd3ee53be86309532.tar.gz bcm5719-llvm-4afd7d2316d56e74091089fbd3ee53be86309532.zip | |
Added soft fail checks for the disassembler when decoding some corner cases of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM.
llvm-svn: 153252
Diffstat (limited to 'llvm/test/MC/Disassembler/ARM/arm-tests.txt')
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/arm-tests.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/MC/Disassembler/ARM/arm-tests.txt b/llvm/test/MC/Disassembler/ARM/arm-tests.txt index 264a78a83e0..ce1446b02b1 100644 --- a/llvm/test/MC/Disassembler/ARM/arm-tests.txt +++ b/llvm/test/MC/Disassembler/ARM/arm-tests.txt @@ -201,7 +201,7 @@ 0x20 0x51 0x17 0xe6 # CHECK: strdeq r2, r3, [r0], -r8 -0xf8 0x24 0x00 0x00 +0xf8 0x20 0x00 0x00 # CHECK: ldrdeq r2, r3, [r0], -r12 0xdc 0x24 0x00 0x00 |
