summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/ARM/neont2-reciprocal-encoding.s
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2010-12-03 22:31:40 +0000
committerJim Grosbach <grosbach@apple.com>2010-12-03 22:31:40 +0000
commit567ebd0cb548bead241a363fa17db5508a439eae (patch)
tree75d270abcb0911032853210383283ede10483a7b /llvm/test/MC/ARM/neont2-reciprocal-encoding.s
parenta6c55a31952d22465e140e1b4e4767866a4f5f86 (diff)
downloadbcm5719-llvm-567ebd0cb548bead241a363fa17db5508a439eae.tar.gz
bcm5719-llvm-567ebd0cb548bead241a363fa17db5508a439eae.zip
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order
halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
Diffstat (limited to 'llvm/test/MC/ARM/neont2-reciprocal-encoding.s')
-rw-r--r--llvm/test/MC/ARM/neont2-reciprocal-encoding.s24
1 files changed, 12 insertions, 12 deletions
diff --git a/llvm/test/MC/ARM/neont2-reciprocal-encoding.s b/llvm/test/MC/ARM/neont2-reciprocal-encoding.s
index 918333b59c5..73b6d8f92b1 100644
--- a/llvm/test/MC/ARM/neont2-reciprocal-encoding.s
+++ b/llvm/test/MC/ARM/neont2-reciprocal-encoding.s
@@ -2,27 +2,27 @@
.code 16
-@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xff]
+@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x04]
vrecpe.u32 d16, d16
-@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0x60,0x04,0xfb,0xff]
+@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x04]
vrecpe.u32 q8, q8
-@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0x20,0x05,0xfb,0xff]
+@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x05]
vrecpe.f32 d16, d16
-@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0x60,0x05,0xfb,0xff]
+@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x05]
vrecpe.f32 q8, q8
-@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x40,0xef]
+@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x0f]
vrecps.f32 d16, d16, d17
-@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x40,0xef]
+@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x0f]
vrecps.f32 q8, q8, q9
-@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xa0,0x04,0xfb,0xff]
+@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x04]
vrsqrte.u32 d16, d16
-@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xe0,0x04,0xfb,0xff]
+@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x04]
vrsqrte.u32 q8, q8
-@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xa0,0x05,0xfb,0xff]
+@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x05]
vrsqrte.f32 d16, d16
-@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xe0,0x05,0xfb,0xff]
+@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x05]
vrsqrte.f32 q8, q8
-@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x60,0xef]
+@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x0f]
vrsqrts.f32 d16, d16, d17
-@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x60,0xef]
+@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x0f]
vrsqrts.f32 q8, q8, q9
OpenPOWER on IntegriCloud