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| author | Bernard Ogden <bogden@arm.com> | 2013-10-29 09:47:35 +0000 |
|---|---|---|
| committer | Bernard Ogden <bogden@arm.com> | 2013-10-29 09:47:35 +0000 |
| commit | ee87e85505bb2b9b5057187785e82715ecbf71f2 (patch) | |
| tree | 5a4e6b2b735c8bce994f19220a1c8a72da4ab84f /llvm/test/MC/ARM/crc32.s | |
| parent | a36a7825fbcd9c8d8147ee00334569c976199ba9 (diff) | |
| download | bcm5719-llvm-ee87e85505bb2b9b5057187785e82715ecbf71f2.tar.gz bcm5719-llvm-ee87e85505bb2b9b5057187785e82715ecbf71f2.zip | |
ARM: Add subtarget feature for CRC
Adds a subtarget feature for the CRC instructions (optional in v8-A) to the ARM (32-bit) backend.
Differential Revision: http://llvm-reviews.chandlerc.com/D2036
llvm-svn: 193599
Diffstat (limited to 'llvm/test/MC/ARM/crc32.s')
| -rw-r--r-- | llvm/test/MC/ARM/crc32.s | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/llvm/test/MC/ARM/crc32.s b/llvm/test/MC/ARM/crc32.s index eeb6fe89394..45a1f0ccadb 100644 --- a/llvm/test/MC/ARM/crc32.s +++ b/llvm/test/MC/ARM/crc32.s @@ -1,5 +1,6 @@ @ RUN: llvm-mc -triple=armv8 -show-encoding < %s | FileCheck %s @ RUN: not llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7 +@ RUN: not llvm-mc -triple=thumbv8 -mattr=-crc -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NOCRC crc32b r0, r1, r2 crc32h r0, r1, r2 crc32w r0, r1, r2 @@ -7,9 +8,12 @@ @ CHECK: crc32b r0, r1, r2 @ encoding: [0x42,0x00,0x01,0xe1] @ CHECK: crc32h r0, r1, r2 @ encoding: [0x42,0x00,0x21,0xe1] @ CHECK: crc32w r0, r1, r2 @ encoding: [0x42,0x00,0x41,0xe1] -@ CHECK-V7: error: instruction requires: armv8 -@ CHECK-V7: error: instruction requires: armv8 -@ CHECK-V7: error: instruction requires: armv8 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-NOCRC: error: instruction requires: crc +@ CHECK-NOCRC: error: instruction requires: crc +@ CHECK-NOCRC: error: instruction requires: crc crc32cb r0, r1, r2 crc32ch r0, r1, r2 @@ -18,6 +22,9 @@ @ CHECK: crc32cb r0, r1, r2 @ encoding: [0x42,0x02,0x01,0xe1] @ CHECK: crc32ch r0, r1, r2 @ encoding: [0x42,0x02,0x21,0xe1] @ CHECK: crc32cw r0, r1, r2 @ encoding: [0x42,0x02,0x41,0xe1] -@ CHECK-V7: error: instruction requires: armv8 -@ CHECK-V7: error: instruction requires: armv8 -@ CHECK-V7: error: instruction requires: armv8 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-NOCRC: error: instruction requires: crc +@ CHECK-NOCRC: error: instruction requires: crc +@ CHECK-NOCRC: error: instruction requires: crc |
