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authorJames Y Knight <jyknight@google.com>2019-03-22 18:27:13 +0000
committerJames Y Knight <jyknight@google.com>2019-03-22 18:27:13 +0000
commitc0e6b8ac3ad442e08d7a16382ff50969ba3f2b2d (patch)
tree51c36938481eb486b2efb0ba04711803b46bbaeb /llvm/test/Instrumentation/MemorySanitizer
parent5e381fb11a01e81a0084338d4a7b35b5180d6f0c (diff)
downloadbcm5719-llvm-c0e6b8ac3ad442e08d7a16382ff50969ba3f2b2d.tar.gz
bcm5719-llvm-c0e6b8ac3ad442e08d7a16382ff50969ba3f2b2d.zip
IR: Support parsing numeric block ids, and emit them in textual output.
Just as as llvm IR supports explicitly specifying numeric value ids for instructions, and emits them by default in textual output, now do the same for blocks. This is a slightly incompatible change in the textual IR format. Previously, llvm would parse numeric labels as string names. E.g. define void @f() { br label %"55" 55: ret void } defined a label *named* "55", even without needing to be quoted, while the reference required quoting. Now, if you intend a block label which looks like a value number to be a name, you must quote it in the definition too (e.g. `"55":`). Previously, llvm would print nameless blocks only as a comment, and would omit it if there was no predecessor. This could cause confusion for readers of the IR, just as unnamed instructions did prior to the addition of "%5 = " syntax, back in 2008 (PR2480). Now, it will always print a label for an unnamed block, with the exception of the entry block. (IMO it may be better to print it for the entry-block as well. However, that requires updating many more tests.) Thus, the following is supported, and is the canonical printing: define i32 @f(i32, i32) { %3 = add i32 %0, %1 br label %4 4: ret i32 %3 } New test cases covering this behavior are added, and other tests updated as required. Differential Revision: https://reviews.llvm.org/D58548 llvm-svn: 356789
Diffstat (limited to 'llvm/test/Instrumentation/MemorySanitizer')
-rw-r--r--llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll4
-rw-r--r--llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll8
-rw-r--r--llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll86
-rw-r--r--llvm/test/Instrumentation/MemorySanitizer/msan_x86_bts_asm.ll2
-rw-r--r--llvm/test/Instrumentation/MemorySanitizer/store-origin.ll4
5 files changed, 52 insertions, 52 deletions
diff --git a/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll b/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll
index 8c245fed50c..7ac6dabd9cb 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll
@@ -44,9 +44,9 @@ entry:
; CHECK-NOT: xor
; CHECK: icmp
; CHECK: br i1
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: call void @__msan_warning_noreturn
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: xor
; CHECK: store
; CHECK: store i32 %x
diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
index 569c2320c5c..a42730de012 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
@@ -39,10 +39,10 @@ entry:
; CHECK: store
; CHECK-ORIGINS: icmp
; CHECK-ORIGINS: br i1
-; CHECK-ORIGINS: <label>
+; CHECK-ORIGINS: {{^[0-9]+}}:
; CHECK-ORIGINS: store
; CHECK-ORIGINS: br label
-; CHECK-ORIGINS: <label>
+; CHECK-ORIGINS: {{^[0-9]+}}:
; CHECK: store
; CHECK: ret void
@@ -63,10 +63,10 @@ entry:
; CHECK: store {{.*}} align 32
; CHECK-ORIGINS: icmp
; CHECK-ORIGINS: br i1
-; CHECK-ORIGINS: <label>
+; CHECK-ORIGINS: {{^[0-9]+}}:
; CHECK-ORIGINS: store {{.*}} align 32
; CHECK-ORIGINS: br label
-; CHECK-ORIGINS: <label>
+; CHECK-ORIGINS: {{^[0-9]+}}:
; CHECK: store {{.*}} align 32
; CHECK: ret void
diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll
index 680a672d12a..870e7768cc6 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll
@@ -40,10 +40,10 @@ entry:
}
; CHECK-LABEL: @Store1
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: [[BASE2:%[0-9]+]] = ptrtoint {{.*}} [[PARAM_SHADOW]]
; CHECK: [[BASE:%[0-9]+]] = ptrtoint {{.*}} [[PARAM_SHADOW]]
; CHECK: [[SHADOW:%[a-z0-9_]+]] = inttoptr {{.*}} [[BASE]]
@@ -51,18 +51,18 @@ entry:
; CHECK: load i64, i64* [[SHADOW]]
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: @__msan_metadata_ptr_for_store_1(i8* %p)
; CHECK: store i8
; If the new shadow is non-zero, jump to __msan_chain_origin()
; CHECK: icmp
; CHECK: br i1
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: @__msan_chain_origin
; Storing origin here:
; CHECK: store i32
; CHECK: br label
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: store i8
; CHECK: ret void
@@ -73,28 +73,28 @@ entry:
}
; CHECK-LABEL: @Store2
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: ptrtoint {{.*}} [[PARAM_SHADOW]]
; Load the shadow of %p and check it
; CHECK: load i64
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: [[REG:%[0-9]+]] = bitcast i16* %p to i8*
; CHECK: @__msan_metadata_ptr_for_store_2(i8* [[REG]])
; CHECK: store i16
; If the new shadow is non-zero, jump to __msan_chain_origin()
; CHECK: icmp
; CHECK: br i1
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: @__msan_chain_origin
; Storing origin here:
; CHECK: store i32
; CHECK: br label
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: store i16
; CHECK: ret void
@@ -106,28 +106,28 @@ entry:
}
; CHECK-LABEL: @Store4
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: ptrtoint {{.*}} [[PARAM_SHADOW]]
; Load the shadow of %p and check it
; CHECK: load i32
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: [[REG:%[0-9]+]] = bitcast i32* %p to i8*
; CHECK: @__msan_metadata_ptr_for_store_4(i8* [[REG]])
; CHECK: store i32
; If the new shadow is non-zero, jump to __msan_chain_origin()
; CHECK: icmp
; CHECK: br i1
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: @__msan_chain_origin
; Storing origin here:
; CHECK: store i32
; CHECK: br label
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: store i32
; CHECK: ret void
@@ -138,28 +138,28 @@ entry:
}
; CHECK-LABEL: @Store8
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: ptrtoint {{.*}} [[PARAM_SHADOW]]
; Load the shadow of %p and check it
; CHECK: load i64
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: [[REG:%[0-9]+]] = bitcast i64* %p to i8*
; CHECK: @__msan_metadata_ptr_for_store_8(i8* [[REG]])
; CHECK: store i64
; If the new shadow is non-zero, jump to __msan_chain_origin()
; CHECK: icmp
; CHECK: br i1
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: @__msan_chain_origin
; Storing origin here:
; CHECK: store i32
; CHECK: br label
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: store i64
; CHECK: ret void
@@ -170,28 +170,28 @@ entry:
}
; CHECK-LABEL: @Store16
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: ptrtoint {{.*}} [[PARAM_SHADOW]]
; Load the shadow of %p and check it
; CHECK: load i64
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: [[REG:%[0-9]+]] = bitcast i128* %p to i8*
; CHECK: @__msan_metadata_ptr_for_store_n(i8* [[REG]], i64 16)
; CHECK: store i128
; If the new shadow is non-zero, jump to __msan_chain_origin()
; CHECK: icmp
; CHECK: br i1
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: @__msan_chain_origin
; Storing origin here:
; CHECK: store i32
; CHECK: br label
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: store i128
; CHECK: ret void
@@ -205,16 +205,16 @@ entry:
}
; CHECK-LABEL: @Load1
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: ptrtoint {{.*}} [[PARAM_SHADOW]]
; Load the shadow of %p and check it
; CHECK: load i64
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; Load the value from %p. This is done before accessing the shadow
; to ease atomic handling.
; CHECK: load i8
@@ -231,16 +231,16 @@ entry:
}
; CHECK-LABEL: @Load2
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: ptrtoint {{.*}} [[PARAM_SHADOW]]
; Load the shadow of %p and check it
; CHECK: load i64
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; Load the value from %p. This is done before accessing the shadow
; to ease atomic handling.
; CHECK: load i16
@@ -258,16 +258,16 @@ entry:
}
; CHECK-LABEL: @Load4
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: ptrtoint {{.*}} [[PARAM_SHADOW]]
; Load the shadow of %p and check it
; CHECK: load i64
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; Load the value from %p. This is done before accessing the shadow
; to ease atomic handling.
; CHECK: load i32
@@ -284,16 +284,16 @@ entry:
}
; CHECK-LABEL: @Load8
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: ptrtoint {{.*}} [[PARAM_SHADOW]]
; Load the shadow of %p and check it
; CHECK: load i64
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; Load the value from %p. This is done before accessing the shadow
; to ease atomic handling.
; CHECK: load i64
@@ -310,16 +310,16 @@ entry:
}
; CHECK-LABEL: @Load16
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: ptrtoint {{.*}} [[PARAM_SHADOW]]
; Load the shadow of %p and check it
; CHECK: load i64
; CHECK: icmp
; CHECK: br i1
-; CHECK-LABEL: <label>
+; CHECK: {{^[0-9]+}}:
; Load the value from %p. This is done before accessing the shadow
; to ease atomic handling.
; CHECK: load i128
@@ -359,7 +359,7 @@ attributes #0 = { "target-features"="+fxsr,+x87,-sse" }
; CHECK: [[VA_ARG_ORIGIN:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 3
; CHECK: [[VA_ARG_OVERFLOW_SIZE:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 4
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: [[OSIZE:%[0-9]+]] = load i64, i64* [[VA_ARG_OVERFLOW_SIZE]]
; Register save area is 48 bytes for non-SSE builds.
; CHECK: [[SIZE:%[0-9]+]] = add i64 48, [[OSIZE]]
@@ -380,13 +380,13 @@ entry:
; CHECK-LABEL: @VarArgCaller
-; CHECK-LABEL: entry:
+; CHECK: entry:
; CHECK: @__msan_get_context_state()
; CHECK: [[PARAM_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 0
; CHECK: [[VA_ARG_SHADOW:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 2
; CHECK: [[VA_ARG_OVERFLOW_SIZE:%[a-z0-9_]+]] = getelementptr {{.*}} i32 0, i32 4
-; CHECK-LABEL: entry.split:
+; CHECK: entry.split:
; CHECK: [[PARAM_SI:%[_a-z0-9]+]] = ptrtoint {{.*}} [[PARAM_SHADOW]]
; CHECK: [[ARG1_S:%[_a-z0-9]+]] = inttoptr i64 [[PARAM_SI]] to i64*
; First argument is initialized
diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_x86_bts_asm.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_x86_bts_asm.ll
index 1c0072f5cea..f46917d32d2 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/msan_x86_bts_asm.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/msan_x86_bts_asm.ll
@@ -96,6 +96,6 @@ if.else: ; preds = %entry
; CHECK: br i1 [[MSCMP]], label %[[IFTRUE:.*]], label {{.*}}
; If yes, raise a warning.
-; CHECK: <label>:[[IFTRUE]]
+; CHECK: [[IFTRUE]]:
; CHECK: call void @__msan_warning
diff --git a/llvm/test/Instrumentation/MemorySanitizer/store-origin.ll b/llvm/test/Instrumentation/MemorySanitizer/store-origin.ll
index 9a0c01936e7..ed8d5362e58 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/store-origin.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/store-origin.ll
@@ -74,7 +74,7 @@ attributes #1 = { nounwind readnone }
; CHECK: store {{.*}}!dbg ![[DBG:[0-9]+]]
; CHECK: icmp
; CHECK: br i1
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; Origin tracking level 1: simply store the origin value
; CHECK-ORIGINS1: store i32 {{.*}}[[ORIGIN]],{{.*}}!dbg !{{.*}}[[DBG]]
@@ -84,6 +84,6 @@ attributes #1 = { nounwind readnone }
; CHECK-ORIGINS2: store i32 {{.*}}[[ORIGIN2]],{{.*}}!dbg !{{.*}}[[DBG]]
; CHECK: br label{{.*}}!dbg !{{.*}}[[DBG]]
-; CHECK: <label>
+; CHECK: {{^[0-9]+}}:
; CHECK: store{{.*}}!dbg !{{.*}}[[DBG]]
; CHECK: ret void
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