[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794

8 files changed, 55 insertions, 55 deletions

diff --git a/llvm/test/Instrumentation/MemorySanitizer/array_types.ll b/llvm/test/Instrumentation/MemorySanitizer/array_types.ll
index fa3835fac77..e96716aaa97 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/array_types.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/array_types.ll
@@ -12,8 +12,8 @@ entry:
 }
 
 ; CHECK-LABEL: @InsertValue(
-; CHECK-DAG: [[Sy:%.*]] = load i32* {{.*}}@__msan_param_tls to i64), i64 8) to i32*)
-; CHECK-DAG: [[Sx:%.*]] = load i32* {{.*}}@__msan_param_tls to i32*)
+; CHECK-DAG: [[Sy:%.*]] = load i32, i32* {{.*}}@__msan_param_tls to i64), i64 8) to i32*)
+; CHECK-DAG: [[Sx:%.*]] = load i32, i32* {{.*}}@__msan_param_tls to i32*)
 ; CHECK: [[A:%.*]] = insertvalue [2 x i32] [i32 -1, i32 -1], i32 [[Sx]], 0
 ; CHECK: [[B:%.*]] = insertvalue [2 x i32] [[A]], i32 [[Sy]], 1
 ; CHECK: store [2 x i32] [[B]], [2 x i32]* {{.*}}@__msan_retval_tls
@@ -28,8 +28,8 @@ entry:
 }
 
 ; CHECK-LABEL: @InsertValueDouble(
-; CHECK-DAG: [[Sy:%.*]] = load i64* {{.*}}@__msan_param_tls to i64), i64 8) to i64*)
-; CHECK-DAG: [[Sx:%.*]] = load i64* getelementptr {{.*}}@__msan_param_tls, i32 0, i32 0
+; CHECK-DAG: [[Sy:%.*]] = load i64, i64* {{.*}}@__msan_param_tls to i64), i64 8) to i64*)
+; CHECK-DAG: [[Sx:%.*]] = load i64, i64* getelementptr {{.*}}@__msan_param_tls, i32 0, i32 0
 ; CHECK: [[A:%.*]] = insertvalue [2 x i64] [i64 -1, i64 -1], i64 [[Sx]], 0
 ; CHECK: [[B:%.*]] = insertvalue [2 x i64] [[A]], i64 [[Sy]], 1
 ; CHECK: store [2 x i64] [[B]], [2 x i64]* {{.*}}@__msan_retval_tls
@@ -43,7 +43,7 @@ entry:
 }
 
 ; CHECK-LABEL: @ExtractValue(
-; CHECK: [[Sa:%.*]] = load [2 x i32]* {{.*}}@__msan_param_tls to [2 x i32]*)
+; CHECK: [[Sa:%.*]] = load [2 x i32], [2 x i32]* {{.*}}@__msan_param_tls to [2 x i32]*)
 ; CHECK: [[Sx:%.*]] = extractvalue [2 x i32] [[Sa]], 1
 ; CHECK: store i32 [[Sx]], i32* {{.*}}@__msan_retval_tls
 ; CHECK: ret i32
@@ -59,7 +59,7 @@ define i32 @ArrayInStruct(%MyStruct %s) sanitize_memory {
 }
 
 ; CHECK-LABEL: @ArrayInStruct(
-; CHECK: [[Ss:%.*]] = load { i32, i32, [3 x i32] }* {{.*}}@__msan_param_tls to { i32, i32, [3 x i32] }*)
+; CHECK: [[Ss:%.*]] = load { i32, i32, [3 x i32] }, { i32, i32, [3 x i32] }* {{.*}}@__msan_param_tls to { i32, i32, [3 x i32] }*)
 ; CHECK: [[Sx:%.*]] = extractvalue { i32, i32, [3 x i32] } [[Ss]], 2, 1
 ; CHECK: store i32 [[Sx]], i32* {{.*}}@__msan_retval_tls
 ; CHECK: ret i32
@@ -71,7 +71,7 @@ define i32 @ArrayOfStructs([3 x { i32, i32 }] %a) sanitize_memory {
 }
 
 ; CHECK-LABEL: @ArrayOfStructs(
-; CHECK: [[Ss:%.*]] = load [3 x { i32, i32 }]* {{.*}}@__msan_param_tls to [3 x { i32, i32 }]*)
+; CHECK: [[Ss:%.*]] = load [3 x { i32, i32 }], [3 x { i32, i32 }]* {{.*}}@__msan_param_tls to [3 x { i32, i32 }]*)
 ; CHECK: [[Sx:%.*]] = extractvalue [3 x { i32, i32 }] [[Ss]], 2, 1
 ; CHECK: store i32 [[Sx]], i32* {{.*}}@__msan_retval_tls
 ; CHECK: ret i32
@@ -83,7 +83,7 @@ define <8 x i16> @ArrayOfVectors([3 x <8 x i16>] %a) sanitize_memory {
 }
 
 ; CHECK-LABEL: @ArrayOfVectors(
-; CHECK: [[Ss:%.*]] = load [3 x <8 x i16>]* {{.*}}@__msan_param_tls to [3 x <8 x i16>]*)
+; CHECK: [[Ss:%.*]] = load [3 x <8 x i16>], [3 x <8 x i16>]* {{.*}}@__msan_param_tls to [3 x <8 x i16>]*)
 ; CHECK: [[Sx:%.*]] = extractvalue [3 x <8 x i16>] [[Ss]], 1
 ; CHECK: store <8 x i16> [[Sx]], <8 x i16>* {{.*}}@__msan_retval_tls
 ; CHECK: ret <8 x i16>
diff --git a/llvm/test/Instrumentation/MemorySanitizer/atomics.ll b/llvm/test/Instrumentation/MemorySanitizer/atomics.ll
index 28736ad7902..e896eaebdd3 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/atomics.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/atomics.ll
@@ -77,13 +77,13 @@ entry:
 
 define i32 @AtomicLoad(i32* %p) sanitize_memory {
 entry:
-  %0 = load atomic i32* %p seq_cst, align 16
+  %0 = load atomic i32, i32* %p seq_cst, align 16
   ret i32 %0
 }
 
 ; CHECK: @AtomicLoad
-; CHECK: load atomic i32* {{.*}} seq_cst, align 16
-; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
+; CHECK: load atomic i32, i32* {{.*}} seq_cst, align 16
+; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32, i32* {{.*}}, align 16
 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
 ; CHECK: ret i32
 
@@ -92,13 +92,13 @@ entry:
 
 define i32 @AtomicLoadAcquire(i32* %p) sanitize_memory {
 entry:
-  %0 = load atomic i32* %p acquire, align 16
+  %0 = load atomic i32, i32* %p acquire, align 16
   ret i32 %0
 }
 
 ; CHECK: @AtomicLoadAcquire
-; CHECK: load atomic i32* {{.*}} acquire, align 16
-; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
+; CHECK: load atomic i32, i32* {{.*}} acquire, align 16
+; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32, i32* {{.*}}, align 16
 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
 ; CHECK: ret i32
 
@@ -107,13 +107,13 @@ entry:
 
 define i32 @AtomicLoadMonotonic(i32* %p) sanitize_memory {
 entry:
-  %0 = load atomic i32* %p monotonic, align 16
+  %0 = load atomic i32, i32* %p monotonic, align 16
   ret i32 %0
 }
 
 ; CHECK: @AtomicLoadMonotonic
-; CHECK: load atomic i32* {{.*}} acquire, align 16
-; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
+; CHECK: load atomic i32, i32* {{.*}} acquire, align 16
+; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32, i32* {{.*}}, align 16
 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
 ; CHECK: ret i32
 
@@ -122,13 +122,13 @@ entry:
 
 define i32 @AtomicLoadUnordered(i32* %p) sanitize_memory {
 entry:
-  %0 = load atomic i32* %p unordered, align 16
+  %0 = load atomic i32, i32* %p unordered, align 16
   ret i32 %0
 }
 
 ; CHECK: @AtomicLoadUnordered
-; CHECK: load atomic i32* {{.*}} acquire, align 16
-; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
+; CHECK: load atomic i32, i32* {{.*}} acquire, align 16
+; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32, i32* {{.*}}, align 16
 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
 ; CHECK: ret i32
 
diff --git a/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll b/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll
index 566022600ea..5e1a3f4442f 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll
@@ -8,7 +8,7 @@ target triple = "x86_64-unknown-linux-gnu"
 
 define <2 x i64> @ByValArgumentShadowLargeAlignment(<2 x i64>* byval %p) sanitize_memory {
 entry:
-  %x = load <2 x i64>* %p
+  %x = load <2 x i64>, <2 x i64>* %p
   ret <2 x i64> %x
 }
 
@@ -19,7 +19,7 @@ entry:
 
 define i16 @ByValArgumentShadowSmallAlignment(i16* byval %p) sanitize_memory {
 entry:
-  %x = load i16* %p
+  %x = load i16, i16* %p
   ret i16 %x
 }
 
diff --git a/llvm/test/Instrumentation/MemorySanitizer/instrumentation-with-call-threshold.ll b/llvm/test/Instrumentation/MemorySanitizer/instrumentation-with-call-threshold.ll
index beb3c5fad73..fb1cdbb5951 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/instrumentation-with-call-threshold.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/instrumentation-with-call-threshold.ll
@@ -11,7 +11,7 @@ target triple = "x86_64-unknown-linux-gnu"
 
 define void @LoadAndCmp(i32* nocapture %a) nounwind uwtable sanitize_memory {
 entry:
-  %0 = load i32* %a, align 4
+  %0 = load i32, i32* %a, align 4
   %tobool = icmp eq i32 %0, 0
   br i1 %tobool, label %if.end, label %if.then
 
diff --git a/llvm/test/Instrumentation/MemorySanitizer/missing_origin.ll b/llvm/test/Instrumentation/MemorySanitizer/missing_origin.ll
index f7385b9dd4c..08289ab67c6 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/missing_origin.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/missing_origin.ll
@@ -14,7 +14,7 @@ entry:
 }
 
 ; CHECK-LABEL: @Shuffle(
-; CHECK: [[A:%.*]] = load i32* {{.*}}@__msan_param_origin_tls,
+; CHECK: [[A:%.*]] = load i32, i32* {{.*}}@__msan_param_origin_tls,
 ; CHECK: store i32 [[A]], i32* @__msan_retval_origin_tls
 ; CHECK: ret <4 x i32>
 
diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
index 3165568d5aa..7472559ddaf 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
@@ -70,7 +70,7 @@ entry:
 ; load followed by cmp: check that we load the shadow and call __msan_warning.
 define void @LoadAndCmp(i32* nocapture %a) nounwind uwtable sanitize_memory {
 entry:
-  %0 = load i32* %a, align 4
+  %0 = load i32, i32* %a, align 4
   %tobool = icmp eq i32 %0, 0
   br i1 %tobool, label %if.end, label %if.then
 
@@ -124,11 +124,11 @@ entry:
   br i1 %tobool, label %if.else, label %if.then
 
   if.then:                                          ; preds = %entry
-  %0 = load i32* %b, align 4
+  %0 = load i32, i32* %b, align 4
   br label %if.end
 
   if.else:                                          ; preds = %entry
-  %1 = load i32* %c, align 4
+  %1 = load i32, i32* %c, align 4
   br label %if.end
 
   if.end:                                           ; preds = %if.else, %if.then
@@ -147,7 +147,7 @@ entry:
 ; Compute shadow for "x << 10"
 define void @ShlConst(i32* nocapture %x) nounwind uwtable sanitize_memory {
 entry:
-  %0 = load i32* %x, align 4
+  %0 = load i32, i32* %x, align 4
   %1 = shl i32 %0, 10
   store i32 %1, i32* %x, align 4
   ret void
@@ -165,7 +165,7 @@ entry:
 ; Compute shadow for "10 << x": it should have 'sext i1'.
 define void @ShlNonConst(i32* nocapture %x) nounwind uwtable sanitize_memory {
 entry:
-  %0 = load i32* %x, align 4
+  %0 = load i32, i32* %x, align 4
   %1 = shl i32 10, %0
   store i32 %1, i32* %x, align 4
   ret void
@@ -182,7 +182,7 @@ entry:
 ; SExt
 define void @SExt(i32* nocapture %a, i16* nocapture %b) nounwind uwtable sanitize_memory {
 entry:
-  %0 = load i16* %b, align 2
+  %0 = load i16, i16* %b, align 2
   %1 = sext i16 %0 to i32
   store i32 %1, i32* %a, align 4
   ret void
@@ -345,8 +345,8 @@ entry:
 }
 
 ; CHECK: @IntToPtr
-; CHECK: load i64*{{.*}}__msan_param_tls
-; CHECK-ORIGINS-NEXT: load i32*{{.*}}__msan_param_origin_tls
+; CHECK: load i64, i64*{{.*}}__msan_param_tls
+; CHECK-ORIGINS-NEXT: load i32, i32*{{.*}}__msan_param_origin_tls
 ; CHECK-NEXT: inttoptr
 ; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
 ; CHECK: ret i8*
@@ -359,7 +359,7 @@ entry:
 }
 
 ; CHECK: @IntToPtr_ZExt
-; CHECK: load i16*{{.*}}__msan_param_tls
+; CHECK: load i16, i16*{{.*}}__msan_param_tls
 ; CHECK: zext
 ; CHECK-NEXT: inttoptr
 ; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
@@ -475,25 +475,25 @@ entry:
 
 define i32 @ShadowLoadAlignmentLarge() nounwind uwtable sanitize_memory {
   %y = alloca i32, align 64
-  %1 = load volatile i32* %y, align 64
+  %1 = load volatile i32, i32* %y, align 64
   ret i32 %1
 }
 
 ; CHECK: @ShadowLoadAlignmentLarge
-; CHECK: load volatile i32* {{.*}} align 64
-; CHECK: load i32* {{.*}} align 64
+; CHECK: load volatile i32, i32* {{.*}} align 64
+; CHECK: load i32, i32* {{.*}} align 64
 ; CHECK: ret i32
 
 define i32 @ShadowLoadAlignmentSmall() nounwind uwtable sanitize_memory {
   %y = alloca i32, align 2
-  %1 = load volatile i32* %y, align 2
+  %1 = load volatile i32, i32* %y, align 2
   ret i32 %1
 }
 
 ; CHECK: @ShadowLoadAlignmentSmall
-; CHECK: load volatile i32* {{.*}} align 2
-; CHECK: load i32* {{.*}} align 2
-; CHECK-ORIGINS: load i32* {{.*}} align 4
+; CHECK: load volatile i32, i32* {{.*}} align 2
+; CHECK: load i32, i32* {{.*}} align 2
+; CHECK-ORIGINS: load i32, i32* {{.*}} align 4
 ; CHECK: ret i32
 
 
@@ -580,8 +580,8 @@ define <16 x i8> @LoadIntrinsic(i8* %p) nounwind uwtable sanitize_memory {
 declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %p) nounwind
 
 ; CHECK: @LoadIntrinsic
-; CHECK: load <16 x i8>* {{.*}} align 1
-; CHECK-ORIGINS: [[ORIGIN:%[01-9a-z]+]] = load i32* {{.*}}
+; CHECK: load <16 x i8>, <16 x i8>* {{.*}} align 1
+; CHECK-ORIGINS: [[ORIGIN:%[01-9a-z]+]] = load i32, i32* {{.*}}
 ; CHECK-NOT: br
 ; CHECK-NOT: = or
 ; CHECK: call <16 x i8> @llvm.x86.sse3.ldu.dq
@@ -602,10 +602,10 @@ define <8 x i16> @Paddsw128(<8 x i16> %a, <8 x i16> %b) nounwind uwtable sanitiz
 declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) nounwind
 
 ; CHECK: @Paddsw128
-; CHECK-NEXT: load <8 x i16>* {{.*}} @__msan_param_tls
-; CHECK-ORIGINS: load i32* {{.*}} @__msan_param_origin_tls
-; CHECK-NEXT: load <8 x i16>* {{.*}} @__msan_param_tls
-; CHECK-ORIGINS: load i32* {{.*}} @__msan_param_origin_tls
+; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls
+; CHECK-ORIGINS: load i32, i32* {{.*}} @__msan_param_origin_tls
+; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls
+; CHECK-ORIGINS: load i32, i32* {{.*}} @__msan_param_origin_tls
 ; CHECK-NEXT: = or <8 x i16>
 ; CHECK-ORIGINS: = bitcast <8 x i16> {{.*}} to i128
 ; CHECK-ORIGINS-NEXT: = icmp ne i128 {{.*}}, 0
@@ -620,13 +620,13 @@ declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) nounwind
 ; Check that shadow of such vector is a vector of integers.
 
 define <8 x i8*> @VectorOfPointers(<8 x i8*>* %p) nounwind uwtable sanitize_memory {
-  %x = load <8 x i8*>* %p
+  %x = load <8 x i8*>, <8 x i8*>* %p
   ret <8 x i8*> %x
 }
 
 ; CHECK: @VectorOfPointers
-; CHECK: load <8 x i8*>*
-; CHECK: load <8 x i64>*
+; CHECK: load <8 x i8*>, <8 x i8*>*
+; CHECK: load <8 x i64>, <8 x i64>*
 ; CHECK: store <8 x i64> {{.*}} @__msan_retval_tls
 ; CHECK: ret <8 x i8*>
 
@@ -772,7 +772,7 @@ cond.end:                                         ; preds = %cond.false, %cond.t
 
 define i32 @NoSanitizeMemoryParamTLS(i32* nocapture readonly %x) {
 entry:
-  %0 = load i32* %x, align 4
+  %0 = load i32, i32* %x, align 4
   %call = tail call i32 @NoSanitizeMemoryParamTLSHelper(i32 %0)
   ret i32 %call
 }
@@ -792,7 +792,7 @@ entry:
 }
 
 ; CHECK: @ArgumentShadowAlignment
-; CHECK: load <2 x i64>* {{.*}} @__msan_param_tls {{.*}}, align 8
+; CHECK: load <2 x i64>, <2 x i64>* {{.*}} @__msan_param_tls {{.*}}, align 8
 ; CHECK: store <2 x i64> {{.*}} @__msan_retval_tls {{.*}}, align 8
 ; CHECK: ret <2 x i64>
 
@@ -835,10 +835,10 @@ entry:
   %agg.tmp2 = alloca %struct.StructByVal, align 8
   %0 = bitcast %struct.StructByVal* %s to i8*
   %agg.tmp.sroa.0.0..sroa_cast = bitcast %struct.StructByVal* %s to i64*
-  %agg.tmp.sroa.0.0.copyload = load i64* %agg.tmp.sroa.0.0..sroa_cast, align 4
+  %agg.tmp.sroa.0.0.copyload = load i64, i64* %agg.tmp.sroa.0.0..sroa_cast, align 4
   %agg.tmp.sroa.2.0..sroa_idx = getelementptr inbounds %struct.StructByVal, %struct.StructByVal* %s, i64 0, i32 2
   %agg.tmp.sroa.2.0..sroa_cast = bitcast i32* %agg.tmp.sroa.2.0..sroa_idx to i64*
-  %agg.tmp.sroa.2.0.copyload = load i64* %agg.tmp.sroa.2.0..sroa_cast, align 4
+  %agg.tmp.sroa.2.0.copyload = load i64, i64* %agg.tmp.sroa.2.0..sroa_cast, align 4
   %1 = bitcast %struct.StructByVal* %agg.tmp2 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* %0, i64 16, i32 4, i1 false)
   call void (i32, ...)* @VAArgStructFn(i32 undef, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, %struct.StructByVal* byval align 8 %agg.tmp2)
diff --git a/llvm/test/Instrumentation/MemorySanitizer/unreachable.ll b/llvm/test/Instrumentation/MemorySanitizer/unreachable.ll
index c8130717c7d..e9a79ce0d0e 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/unreachable.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/unreachable.ll
@@ -10,7 +10,7 @@ entry:
   br label %exit
 
 unreachable:
-  %x = load i32* %p
+  %x = load i32, i32* %p
   br label %exit
 
 exit:
diff --git a/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll b/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
index 9425e25bde5..a7d5f211501 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
@@ -34,7 +34,7 @@ entry:
 }
 
 ; CHECK: @test_cvtsi2sd
-; CHECK: [[Sa:%[_01-9a-z]+]] = load i32* {{.*}} @__msan_param_tls
+; CHECK: [[Sa:%[_01-9a-z]+]] = load i32, i32* {{.*}} @__msan_param_tls
 ; CHECK: [[Sout0:%[_01-9a-z]+]] = insertelement <2 x i64> <i64 -1, i64 -1>, i64 {{.*}}, i32 1
 ; Clear low half of result shadow
 ; CHECK: [[Sout:%[_01-9a-z]+]] = insertelement <2 x i64> {{.*}}[[Sout0]], i64 0, i32 0