summaryrefslogtreecommitdiffstats
path: root/llvm/test/ExecutionEngine
diff options
context:
space:
mode:
authorYichao Yu <yyc1992@gmail.com>2016-12-15 22:36:53 +0000
committerYichao Yu <yyc1992@gmail.com>2016-12-15 22:36:53 +0000
commit8f8cdd00dab0c56011806eb0e2fe211364be71f7 (patch)
treef197159d279cb6e101c314f089b5f418e6eeac06 /llvm/test/ExecutionEngine
parentd69b9414b3cbd2ba738e7d48159643c69633c4d2 (diff)
downloadbcm5719-llvm-8f8cdd00dab0c56011806eb0e2fe211364be71f7.tar.gz
bcm5719-llvm-8f8cdd00dab0c56011806eb0e2fe211364be71f7.zip
Fix R_AARCH64_MOVW_UABS_G3 relocation
Summary: The relocation is missing mask so an address that has non-zero bits in 47:43 may overwrite the register number. (Frequently shows up as target register changed to `xzr`....) Reviewers: t.p.northover, lhames Subscribers: davide, aemerson, rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D27609 llvm-svn: 289880
Diffstat (limited to 'llvm/test/ExecutionEngine')
-rw-r--r--llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-relocations.s34
-rw-r--r--llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s33
2 files changed, 67 insertions, 0 deletions
diff --git a/llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-relocations.s b/llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-relocations.s
new file mode 100644
index 00000000000..3ba95e4d394
--- /dev/null
+++ b/llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-relocations.s
@@ -0,0 +1,34 @@
+# RUN: llvm-mc -triple=aarch64_be-none-linux-gnu -filetype=obj -o %T/be-reloc.o %s
+# RUN: llvm-rtdyld -triple=aarch64_be-none-linux-gnu -verify -dummy-extern f=0x0123456789abcdef -check=%s %T/be-reloc.o
+
+ .text
+ .globl g
+ .p2align 2
+ .type g,@function
+g:
+# R_AARCH64_MOVW_UABS_G3
+ movz x0, #:abs_g3:f
+# R_AARCH64_MOVW_UABS_G2_NC
+ movk x0, #:abs_g2_nc:f
+# R_AARCH64_MOVW_UABS_G1_NC
+ movk x0, #:abs_g1_nc:f
+# R_AARCH64_MOVW_UABS_G0_NC
+ movk x0, #:abs_g0_nc:f
+ ret
+ .Lfunc_end0:
+ .size g, .Lfunc_end0-g
+
+ .type k,@object
+ .data
+ .globl k
+ .p2align 3
+k:
+ .xword f
+ .size k, 8
+
+# LE instructions read as BE
+# rtdyld-check: *{4}(g) = 0x6024e0d2
+# rtdyld-check: *{4}(g + 4) = 0xe0acc8f2
+# rtdyld-check: *{4}(g + 8) = 0x6035b1f2
+# rtdyld-check: *{4}(g + 12) = 0xe0bd99f2
+# rtdyld-check: *{8}k = f
diff --git a/llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s b/llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s
new file mode 100644
index 00000000000..f83f6bf8793
--- /dev/null
+++ b/llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s
@@ -0,0 +1,33 @@
+# RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj -o %T/reloc.o %s
+# RUN: llvm-rtdyld -triple=arm64-none-linux-gnu -verify -dummy-extern f=0x0123456789abcdef -check=%s %T/reloc.o
+
+ .text
+ .globl g
+ .p2align 2
+ .type g,@function
+g:
+# R_AARCH64_MOVW_UABS_G3
+ movz x0, #:abs_g3:f
+# R_AARCH64_MOVW_UABS_G2_NC
+ movk x0, #:abs_g2_nc:f
+# R_AARCH64_MOVW_UABS_G1_NC
+ movk x0, #:abs_g1_nc:f
+# R_AARCH64_MOVW_UABS_G0_NC
+ movk x0, #:abs_g0_nc:f
+ ret
+ .Lfunc_end0:
+ .size g, .Lfunc_end0-g
+
+ .type k,@object
+ .data
+ .globl k
+ .p2align 3
+k:
+ .xword f
+ .size k, 8
+
+# rtdyld-check: *{4}(g) = 0xd2e02460
+# rtdyld-check: *{4}(g + 4) = 0xf2c8ace0
+# rtdyld-check: *{4}(g + 8) = 0xf2b13560
+# rtdyld-check: *{4}(g + 12) = 0xf299bde0
+# rtdyld-check: *{8}k = f
OpenPOWER on IntegriCloud