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| author | Weiming Zhao <weimingz@codeaurora.org> | 2012-11-16 21:55:34 +0000 |
|---|---|---|
| committer | Weiming Zhao <weimingz@codeaurora.org> | 2012-11-16 21:55:34 +0000 |
| commit | 8f56f88661598f556fa646462e2f2b26ba4e2ce8 (patch) | |
| tree | 491d71958a74d940fce3b8476fb483835f67f1e8 /llvm/test/ExecutionEngine/test-logical.ll | |
| parent | dddfc513973815b7c8aabf270b9c45da7ac74c01 (diff) | |
| download | bcm5719-llvm-8f56f88661598f556fa646462e2f2b26ba4e2ce8.tar.gz bcm5719-llvm-8f56f88661598f556fa646462e2f2b26ba4e2ce8.zip | |
Remove hard coded registers in ARM ldrexd and strexd instructions
This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.
llvm-svn: 168207
Diffstat (limited to 'llvm/test/ExecutionEngine/test-logical.ll')
0 files changed, 0 insertions, 0 deletions
