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authorMatthias Braun <matze@braunis.de>2015-01-14 22:25:14 +0000
committerMatthias Braun <matze@braunis.de>2015-01-14 22:25:14 +0000
commit96a319588a752c0254f8b214c2454a95855bcac4 (patch)
tree53926ca960fe31fbe208e8e3689b8dfe0f352ad3 /llvm/test/DebugInfo/cu-range-hole.ll
parent503cf3bff9ae2af77d9bcd7a76d195930cb85022 (diff)
downloadbcm5719-llvm-96a319588a752c0254f8b214c2454a95855bcac4.tar.gz
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MachineVerifier: Allow undef reads if a matching superreg is defined.
Summary: Some pseudo instruction expansions break down a wide register use into multiple uses of smaller sub registers. If the super register was partially undefined the broken down sub registers may be completely undefined now leading to MachineVerifier complaints. Unfortunately liveness information to add the required dead flags is not easily (cheaply) available when expanding pseudo instructions. This commit changes the verifier to be quiet if there is an additional implicit use of a super register. Pseudo instruction expanders can use this to mark cases where partially defined values get potentially broken into completely undefined ones. Differential Revision: http://reviews.llvm.org/D6973 llvm-svn: 226047
Diffstat (limited to 'llvm/test/DebugInfo/cu-range-hole.ll')
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