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| author | Adrian Prantl <aprantl@apple.com> | 2014-10-01 18:10:54 +0000 |
|---|---|---|
| committer | Adrian Prantl <aprantl@apple.com> | 2014-10-01 18:10:54 +0000 |
| commit | b458dc2eeed72df3985f9bd63c3dd633004801ea (patch) | |
| tree | 68c99cdd1181e9fee6602b462834c65060418992 /llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll | |
| parent | af11fdba0ae7f09054e71744b454c6e1fd47cf7c (diff) | |
| download | bcm5719-llvm-b458dc2eeed72df3985f9bd63c3dd633004801ea.tar.gz bcm5719-llvm-b458dc2eeed72df3985f9bd63c3dd633004801ea.zip | |
Revert r218778 while investigating buldbot breakage.
"Move the complex address expression out of DIVariable and into an extra"
llvm-svn: 218782
Diffstat (limited to 'llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll')
| -rw-r--r-- | llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll b/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll index 3a14b1168fb..8816fe77cf0 100644 --- a/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll +++ b/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll @@ -60,19 +60,19 @@ define i32 @test(i32 %a) nounwind uwtable ssp { entry: %a.addr = alloca i32, align 4 store i32 %a, i32* %a.addr, align 4 - call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !15, metadata !{}), !dbg !16 + call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !15), !dbg !16 %0 = load i32* %a.addr, align 4, !dbg !17 %call = call i32 @fn(i32 %0), !dbg !17 ret i32 %call, !dbg !17 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone define i32 @fn(i32 %a) nounwind uwtable ssp { entry: %a.addr = alloca i32, align 4 store i32 %a, i32* %a.addr, align 4 - call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !19, metadata !{}), !dbg !20 + call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !19), !dbg !20 %0 = load i32* %a.addr, align 4, !dbg !21 ret i32 %0, !dbg !21 } |
