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author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
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committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/DebugInfo/X86/dbg_value_direct.ll | |
parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/DebugInfo/X86/dbg_value_direct.ll')
-rw-r--r-- | llvm/test/DebugInfo/X86/dbg_value_direct.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/DebugInfo/X86/dbg_value_direct.ll b/llvm/test/DebugInfo/X86/dbg_value_direct.ll index 6723ba56913..20034c021f3 100644 --- a/llvm/test/DebugInfo/X86/dbg_value_direct.ll +++ b/llvm/test/DebugInfo/X86/dbg_value_direct.ll @@ -51,7 +51,7 @@ entry: %17 = lshr i64 %16, 3 %18 = add i64 %17, 2147450880 %19 = inttoptr i64 %18 to i8* - %20 = load i8* %19 + %20 = load i8, i8* %19 %21 = icmp ne i8 %20, 0 call void @llvm.dbg.declare(metadata i32* %3, metadata !23, metadata !28) br i1 %21, label %22, label %28 @@ -91,8 +91,8 @@ declare void @_ZN1AC1Ev(%struct.A*) #2 define internal void @asan.module_ctor() "stack-protector-buffer-size"="1" { call void @__asan_init_v3() - %1 = load volatile i64* @__asan_mapping_offset - %2 = load volatile i64* @__asan_mapping_scale + %1 = load volatile i64, i64* @__asan_mapping_offset + %2 = load volatile i64, i64* @__asan_mapping_scale ret void } |