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| author | Sanjay Patel <spatel@rotateright.com> | 2017-04-18 22:36:59 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-04-18 22:36:59 +0000 |
| commit | ff981f9256191fae109017abd06a2472ec31ded1 (patch) | |
| tree | d7a300859397ad190018814b1a40fd2e2a996fb5 /llvm/test/CodeGen | |
| parent | 63220d520320f2f960280e9561dcf24818eeb4a6 (diff) | |
| download | bcm5719-llvm-ff981f9256191fae109017abd06a2472ec31ded1.tar.gz bcm5719-llvm-ff981f9256191fae109017abd06a2472ec31ded1.zip | |
[x86] add tests for potential andn optimization; NFC
llvm-svn: 300617
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/avx-logic.ll | 42 |
1 files changed, 40 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/avx-logic.ll b/llvm/test/CodeGen/X86/avx-logic.ll index e9e7d5aea27..95a61ec8bc3 100644 --- a/llvm/test/CodeGen/X86/avx-logic.ll +++ b/llvm/test/CodeGen/X86/avx-logic.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 define <4 x double> @andpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { ; CHECK-LABEL: andpd256: @@ -271,3 +271,41 @@ entry: ret <2 x i64> %x } +define <4 x i32> @and_xor_splat1_v4i32(<4 x i32> %x) nounwind { +; AVX-LABEL: and_xor_splat1_v4i32: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} xmm1 = [1,1,1,1] +; AVX-NEXT: vxorps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retq +; +; AVX512-LABEL: and_xor_splat1_v4i32: +; AVX512: # BB#0: +; AVX512-NEXT: vbroadcastss {{.*}}(%rip), %xmm1 +; AVX512-NEXT: vxorps %xmm1, %xmm0, %xmm0 +; AVX512-NEXT: vandps %xmm1, %xmm0, %xmm0 +; AVX512-NEXT: retq + %xor = xor <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1> + %and = and <4 x i32> %xor, <i32 1, i32 1, i32 1, i32 1> + ret <4 x i32> %and +} + +define <4 x i64> @and_xor_splat1_v4i64(<4 x i64> %x) nounwind { +; AVX-LABEL: and_xor_splat1_v4i64: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,1,1] +; AVX-NEXT: vxorps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: vandps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retq +; +; AVX512-LABEL: and_xor_splat1_v4i64: +; AVX512: # BB#0: +; AVX512-NEXT: vbroadcastsd {{.*}}(%rip), %ymm1 +; AVX512-NEXT: vxorps %ymm1, %ymm0, %ymm0 +; AVX512-NEXT: vandps %ymm1, %ymm0, %ymm0 +; AVX512-NEXT: retq + %xor = xor <4 x i64> %x, <i64 1, i64 1, i64 1, i64 1> + %and = and <4 x i64> %xor, <i64 1, i64 1, i64 1, i64 1> + ret <4 x i64> %and +} + |
