[PowerPC] Revert r310346 (and followups r310356 & r310424) which

introduce a miscompile bug.

There appears to be a bug where the generated code to extract the sign
bit doesn't work correctly for 32-bit inputs. I've replied to the
original commit pointing out the problem. I think I see by inspection
(and reading the manual for PPC) how to fix this, but I can't be 100%
confident and I also don't know what the best way to test this is.
Currently it seems nearly impossible to get the backend to hit this code
path, but the patch autohr is likely in a better position to craft such
test cases than I am, and based on where the bug is it should be easily
done.

Original commit message for r310346:
"""
[PowerPC] Eliminate compares - add i32 sext/zext handling for SETLE/SETGE

Adds handling for SETLE/SETGE comparisons on i32 values. Furthermore, it
adds the handling for the special case where RHS == 0.

Differential Revision: https://reviews.llvm.org/D34048
"""

llvm-svn: 310809

12 files changed, 0 insertions, 819 deletions

diff --git a/llvm/test/CodeGen/PowerPC/testComparesigesc.ll b/llvm/test/CodeGen/PowerPC/testComparesigesc.ll
deleted file mode 100644
index 3136f8d7a2d..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesigesc.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-@glob = common local_unnamed_addr global i8 0, align 1
-
-define signext i32 @test_igesc(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_igesc:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i8 %a, %b
-  %conv2 = zext i1 %cmp to i32
-  ret i32 %conv2
-}
-
-define signext i32 @test_igesc_sext(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_igesc_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i8 %a, %b
-  %sub = sext i1 %cmp to i32
-  ret i32 %sub
-}
-
-define void @test_igesc_store(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_igesc_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    stb r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i8 %a, %b
-  %conv3 = zext i1 %cmp to i8
-  store i8 %conv3, i8* @glob, align 1
-  ret void
-}
-
-define void @test_igesc_sext_store(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_igesc_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    stb r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i8 %a, %b
-  %conv3 = sext i1 %cmp to i8
-  store i8 %conv3, i8* @glob, align 1
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testComparesigesi.ll b/llvm/test/CodeGen/PowerPC/testComparesigesi.ll
deleted file mode 100644
index 01de5d97628..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesigesi.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-@glob = common local_unnamed_addr global i32 0, align 4
-
-define signext i32 @test_igesi(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_igesi:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i32 %a, %b
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define signext i32 @test_igesi_sext(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_igesi_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i32 %a, %b
-  %sub = sext i1 %cmp to i32
-  ret i32 %sub
-}
-
-define void @test_igesi_store(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_igesi_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    stw r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i32 %a, %b
-  %conv = zext i1 %cmp to i32
-  store i32 %conv, i32* @glob, align 4
-  ret void
-}
-
-define void @test_igesi_sext_store(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_igesi_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    stw r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i32 %a, %b
-  %sub = sext i1 %cmp to i32
-  store i32 %sub, i32* @glob, align 4
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testComparesigess.ll b/llvm/test/CodeGen/PowerPC/testComparesigess.ll
deleted file mode 100644
index 370f5beebe4..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesigess.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-@glob = common local_unnamed_addr global i16 0, align 2
-
-define signext i32 @test_igess(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_igess:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i16 %a, %b
-  %conv2 = zext i1 %cmp to i32
-  ret i32 %conv2
-}
-
-define signext i32 @test_igess_sext(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_igess_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i16 %a, %b
-  %sub = sext i1 %cmp to i32
-  ret i32 %sub
-}
-
-define void @test_igess_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_igess_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    sth r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i16 %a, %b
-  %conv3 = zext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
-
-define void @test_igess_sext_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_igess_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    sth r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i16 %a, %b
-  %conv3 = sext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testComparesilesc.ll b/llvm/test/CodeGen/PowerPC/testComparesilesc.ll
deleted file mode 100644
index 2ff5698d651..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesilesc.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-@glob = common local_unnamed_addr global i8 0, align 1
-
-define signext i32 @test_ilesc(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_ilesc:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i8 %a, %b
-  %conv2 = zext i1 %cmp to i32
-  ret i32 %conv2
-}
-
-define signext i32 @test_ilesc_sext(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_ilesc_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i8 %a, %b
-  %sub = sext i1 %cmp to i32
-  ret i32 %sub
-}
-
-define void @test_ilesc_store(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_ilesc_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    stb r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i8 %a, %b
-  %conv3 = zext i1 %cmp to i8
-  store i8 %conv3, i8* @glob, align 1
-  ret void
-}
-
-define void @test_ilesc_sext_store(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_ilesc_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    stb r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i8 %a, %b
-  %conv3 = sext i1 %cmp to i8
-  store i8 %conv3, i8* @glob, align 1
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testComparesilesi.ll b/llvm/test/CodeGen/PowerPC/testComparesilesi.ll
deleted file mode 100644
index 53dc7cca1c5..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesilesi.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-@glob = common local_unnamed_addr global i32 0, align 4
-
-define signext i32 @test_ilesi(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_ilesi:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i32 %a, %b
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define signext i32 @test_ilesi_sext(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_ilesi_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i32 %a, %b
-  %sub = sext i1 %cmp to i32
-  ret i32 %sub
-}
-
-define void @test_ilesi_store(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_ilesi_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    stw r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i32 %a, %b
-  %conv = zext i1 %cmp to i32
-  store i32 %conv, i32* @glob, align 4
-  ret void
-}
-
-define void @test_ilesi_sext_store(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_ilesi_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    stw r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i32 %a, %b
-  %sub = sext i1 %cmp to i32
-  store i32 %sub, i32* @glob, align 4
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testComparesiless.ll b/llvm/test/CodeGen/PowerPC/testComparesiless.ll
deleted file mode 100644
index 756500a77da..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesiless.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-@glob = common local_unnamed_addr global i16 0, align 2
-
-define signext i32 @test_iless(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_iless:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i16 %a, %b
-  %conv2 = zext i1 %cmp to i32
-  ret i32 %conv2
-}
-
-define signext i32 @test_iless_sext(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_iless_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i16 %a, %b
-  %sub = sext i1 %cmp to i32
-  ret i32 %sub
-}
-
-define void @test_iless_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_iless_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    sth r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i16 %a, %b
-  %conv3 = zext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
-
-define void @test_iless_sext_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_iless_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    sth r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i16 %a, %b
-  %conv3 = sext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testComparesllgesc.ll b/llvm/test/CodeGen/PowerPC/testComparesllgesc.ll
deleted file mode 100644
index 58f4aa92914..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesllgesc.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-@glob = common local_unnamed_addr global i8 0, align 1
-
-define i64 @test_llgesc(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_llgesc:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i8 %a, %b
-  %conv3 = zext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-define i64 @test_llgesc_sext(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_llgesc_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i8 %a, %b
-  %conv3 = sext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-define void @test_llgesc_store(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_llgesc_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    stb r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i8 %a, %b
-  %conv3 = zext i1 %cmp to i8
-  store i8 %conv3, i8* @glob, align 1
-  ret void
-}
-
-define void @test_llgesc_sext_store(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_llgesc_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    stb r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i8 %a, %b
-  %conv3 = sext i1 %cmp to i8
-  store i8 %conv3, i8* @glob, align 1
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testComparesllgesi.ll b/llvm/test/CodeGen/PowerPC/testComparesllgesi.ll
deleted file mode 100644
index 52cec726081..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesllgesi.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-@glob = common local_unnamed_addr global i32 0, align 4
-
-define i64 @test_llgesi(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_llgesi:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i32 %a, %b
-  %conv1 = zext i1 %cmp to i64
-  ret i64 %conv1
-}
-
-define i64 @test_llgesi_sext(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_llgesi_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i32 %a, %b
-  %conv1 = sext i1 %cmp to i64
-  ret i64 %conv1
-}
-
-define void @test_llgesi_store(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_llgesi_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    stw r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i32 %a, %b
-  %conv = zext i1 %cmp to i32
-  store i32 %conv, i32* @glob, align 4
-  ret void
-}
-
-define void @test_llgesi_sext_store(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_llgesi_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    stw r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i32 %a, %b
-  %sub = sext i1 %cmp to i32
-  store i32 %sub, i32* @glob, align 4
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testComparesllgess.ll b/llvm/test/CodeGen/PowerPC/testComparesllgess.ll
deleted file mode 100644
index bcc2408ce3e..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesllgess.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-@glob = common local_unnamed_addr global i16 0, align 2
-
-define i64 @test_llgess(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_llgess:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i16 %a, %b
-  %conv3 = zext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-define i64 @test_llgess_sext(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_llgess_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i16 %a, %b
-  %conv3 = sext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-define void @test_llgess_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_llgess_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    sth r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i16 %a, %b
-  %conv3 = zext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
-
-define void @test_llgess_sext_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_llgess_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r4, r3
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    sth r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sge i16 %a, %b
-  %conv3 = sext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testCompareslllesc.ll b/llvm/test/CodeGen/PowerPC/testCompareslllesc.ll
deleted file mode 100644
index d6454f2691a..00000000000
--- a/llvm/test/CodeGen/PowerPC/testCompareslllesc.ll
+++ /dev/null
@@ -1,69 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-
-@glob = common local_unnamed_addr global i8 0, align 1
-
-define i64 @test_lllesc(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_lllesc:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i8 %a, %b
-  %conv3 = zext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-define i64 @test_lllesc_sext(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_lllesc_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i8 %a, %b
-  %conv3 = sext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-define void @test_lllesc_store(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_lllesc_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    stb r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i8 %a, %b
-  %conv3 = zext i1 %cmp to i8
-  store i8 %conv3, i8* @glob, align 1
-  ret void
-}
-
-define void @test_lllesc_sext_store(i8 signext %a, i8 signext %b) {
-; CHECK-LABEL: test_lllesc_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    stb r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i8 %a, %b
-  %conv3 = sext i1 %cmp to i8
-  store i8 %conv3, i8* @glob, align 1
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testCompareslllesi.ll b/llvm/test/CodeGen/PowerPC/testCompareslllesi.ll
deleted file mode 100644
index c8ae990e8dc..00000000000
--- a/llvm/test/CodeGen/PowerPC/testCompareslllesi.ll
+++ /dev/null
@@ -1,69 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-
-@glob = common local_unnamed_addr global i32 0, align 4
-
-define i64 @test_lllesi(i32 signext %a, i32 signext %b)  {
-; CHECK-LABEL: test_lllesi:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i32 %a, %b
-  %conv1 = zext i1 %cmp to i64
-  ret i64 %conv1
-}
-
-define i64 @test_lllesi_sext(i32 signext %a, i32 signext %b)  {
-; CHECK-LABEL: test_lllesi_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i32 %a, %b
-  %conv1 = sext i1 %cmp to i64
-  ret i64 %conv1
-}
-
-define void @test_lllesi_store(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_lllesi_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    stw r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i32 %a, %b
-  %conv = zext i1 %cmp to i32
-  store i32 %conv, i32* @glob, align 4
-  ret void
-}
-
-define void @test_lllesi_sext_store(i32 signext %a, i32 signext %b) {
-; CHECK-LABEL: test_lllesi_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    stw r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i32 %a, %b
-  %sub = sext i1 %cmp to i32
-  store i32 %sub, i32* @glob, align 4
-  ret void
-}
diff --git a/llvm/test/CodeGen/PowerPC/testComparesllless.ll b/llvm/test/CodeGen/PowerPC/testComparesllless.ll
deleted file mode 100644
index 5dc218da342..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesllless.ll
+++ /dev/null
@@ -1,69 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-
-@glob = common local_unnamed_addr global i16 0, align 2
-
-define i64 @test_llless(i16 signext %a, i16 signext %b)  {
-; CHECK-LABEL: test_llless:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i16 %a, %b
-  %conv3 = zext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-define i64 @test_llless_sext(i16 signext %a, i16 signext %b)  {
-; CHECK-LABEL: test_llless_sext:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i16 %a, %b
-  %conv3 = sext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-define void @test_llless_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_llless_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    sth r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i16 %a, %b
-  %conv3 = zext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
-
-define void @test_llless_sext_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_llless_sext_store:
-; CHECK:       # BB#0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT:    subf r3, r3, r4
-; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT:    rldicl r3, r3, 1, 63
-; CHECK-NEXT:    addi r3, r3, -1
-; CHECK-NEXT:    sth r3, 0(r12)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp sle i16 %a, %b
-  %conv3 = sext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}