[X86] Simplify X86ISD::ADD/SUB if we don't use the result flag

Simplify to the generic ISD::ADD/SUB if we don't make use of the result flag.

This mainly helps with ADDCARRY/SUBBORROW intrinsics which get expanded to X86ISD::ADD/SUB but could be simplified further.

Noticed in some of the test cases in PR31754

Differential Revision: https://reviews.llvm.org/D57234

llvm-svn: 352210

3 files changed, 5 insertions, 15 deletions

diff --git a/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll
index 34f8ff87259..762314a5b55 100644
--- a/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll
@@ -108,9 +108,7 @@ define i32 @load_crash(i64* nocapture readonly %a, i64* nocapture readonly %b, i
 define void @allzeros() {
 ; CHECK-LABEL: allzeros:
 ; CHECK:       ## %bb.0: ## %entry
-; CHECK-NEXT:    xorl %eax, %eax ## encoding: [0x31,0xc0]
-; CHECK-NEXT:    addq $0, %rax ## encoding: [0x48,0x83,0xc0,0x00]
-; CHECK-NEXT:    movq %rax, 0 ## encoding: [0x48,0x89,0x04,0x25,0x00,0x00,0x00,0x00]
+; CHECK-NEXT:    movq $0, 0 ## encoding: [0x48,0xc7,0x04,0x25,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
 ; CHECK-NEXT:    retq ## encoding: [0xc3]
 entry:
   %0 = tail call i8 @llvm.x86.addcarryx.u64(i8 0, i64 0, i64 0, i8* null)
diff --git a/llvm/test/CodeGen/X86/adx-intrinsics.ll b/llvm/test/CodeGen/X86/adx-intrinsics.ll
index d37be065328..6c1c2739c64 100644
--- a/llvm/test/CodeGen/X86/adx-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/adx-intrinsics.ll
@@ -134,9 +134,7 @@ define i32 @load_crash(i64* nocapture readonly %a, i64* nocapture readonly %b, i
 define void @allzeros() {
 ; CHECK-LABEL: allzeros:
 ; CHECK:       ## %bb.0: ## %entry
-; CHECK-NEXT:    xorl %eax, %eax ## encoding: [0x31,0xc0]
-; CHECK-NEXT:    addq $0, %rax ## encoding: [0x48,0x83,0xc0,0x00]
-; CHECK-NEXT:    movq %rax, 0 ## encoding: [0x48,0x89,0x04,0x25,0x00,0x00,0x00,0x00]
+; CHECK-NEXT:    movq $0, 0 ## encoding: [0x48,0xc7,0x04,0x25,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
 ; CHECK-NEXT:    retq ## encoding: [0xc3]
 entry:
   %0 = call { i8, i64 } @llvm.x86.addcarry.64(i8 0, i64 0, i64 0)
diff --git a/llvm/test/CodeGen/X86/combine-adx.ll b/llvm/test/CodeGen/X86/combine-adx.ll
index 15d39184aa9..c2b11e78115 100644
--- a/llvm/test/CodeGen/X86/combine-adx.ll
+++ b/llvm/test/CodeGen/X86/combine-adx.ll
@@ -6,13 +6,11 @@ define i32 @test_addcarry_32_x_0_false(i32 %a0)  {
 ; X86-LABEL: test_addcarry_32_x_0_false:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    addl $0, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_addcarry_32_x_0_false:
 ; X64:       # %bb.0:
-; X64-NEXT:    # kill: def $edi killed $edi def $rdi
-; X64-NEXT:    leal (%rdi), %eax
+; X64-NEXT:    movl %edi, %eax
 ; X64-NEXT:    retq
   %1 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %a0, i32 0)
   %2 = extractvalue { i8, i32 } %1, 1
@@ -22,14 +20,12 @@ define i32 @test_addcarry_32_x_0_false(i32 %a0)  {
 define i32 @test_addcarry_32_0_x_false(i32 %a0)  {
 ; X86-LABEL: test_addcarry_32_0_x_false:
 ; X86:       # %bb.0:
-; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    addl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_addcarry_32_0_x_false:
 ; X64:       # %bb.0:
-; X64-NEXT:    # kill: def $edi killed $edi def $rdi
-; X64-NEXT:    leal (%rdi), %eax
+; X64-NEXT:    movl %edi, %eax
 ; X64-NEXT:    retq
   %1 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 0, i32 %a0)
   %2 = extractvalue { i8, i32 } %1, 1
@@ -40,13 +36,11 @@ define i32 @test_subborrow_32_x_0_false(i32 %a0)  {
 ; X86-LABEL: test_subborrow_32_x_0_false:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    subl $0, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_subborrow_32_x_0_false:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    subl $0, %eax
 ; X64-NEXT:    retq
   %1 = tail call { i8, i32 } @llvm.x86.subborrow.32(i8 0, i32 %a0, i32 0)
   %2 = extractvalue { i8, i32 } %1, 1