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author | Shiva Chen <shiva0217@gmail.com> | 2019-01-18 08:36:06 +0000 |
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committer | Shiva Chen <shiva0217@gmail.com> | 2019-01-18 08:36:06 +0000 |
commit | e84c729aca49c5b8397ba96686bb4e019a95cd37 (patch) | |
tree | 94ce21fa8124ab0613e8572bef3ec588ac54d71e /llvm/test/CodeGen | |
parent | d770da9834227c0751aa4e05ab18bd16112f2f99 (diff) | |
download | bcm5719-llvm-e84c729aca49c5b8397ba96686bb4e019a95cd37.tar.gz bcm5719-llvm-e84c729aca49c5b8397ba96686bb4e019a95cd37.zip |
[ScheduleDAGRRList] Do not preschedule the node has ADJCALLSTACKDOWN parent
We should not pre-scheduled the node has ADJCALLSTACKDOWN parent,
or else, when bottom-up scheduling, ADJCALLSTACKDOWN and
ADJCALLSTACKUP may hold CallResource too long and make other
calls can't be scheduled. If there's no other available node
to schedule, the scheduler will try to rename the register by
creating copy to avoid the conflict which will fail because
CallResource is not a real physical register.
llvm-svn: 351527
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r-- | llvm/test/CodeGen/AVR/pre-schedule.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AVR/pre-schedule.ll b/llvm/test/CodeGen/AVR/pre-schedule.ll new file mode 100644 index 00000000000..c724eea5d36 --- /dev/null +++ b/llvm/test/CodeGen/AVR/pre-schedule.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -march=avr | FileCheck %s +target triple = "avr-unknown-unknown" + +; The case illustrate DAG schedular may pre-schedule the node has +; ADJCALLSTACKDOWN parent, so ADJCALLSTACKUP may hold CallResource too long +; and make other calls can't be scheduled. If there's no other available node +; to schedule, the scheduler will try to rename the register by creating the +; copy to avoid the conflict which will fail because CallResource is not a real +; physical register. +; +; The issue is found by Tim on https://github.com/avr-rust/rust/issues/111 and +; discuss in http://lists.llvm.org/pipermail/llvm-dev/2018-October/127083.html. + +define void @"main"() addrspace(1) { +start: + %0 = or i64 undef, undef + br i1 undef, label %mul_and_call, label %fail + + mul_and_call: + %1 = mul i64 %0, %0 + call addrspace(1) void @"three_ints"(i64 undef, i64 %1, i64 %0) +; The CHECK line only want to make sure the following assertion message +; won't trigger due to create copy of artificial CallResource register. +; llc: llvm/lib/CodeGen/TargetRegisterInfo.cpp:203: const llvm::TargetRegisterClass* llvm::TargetRegisterInfo::getMinimalPhysRegClass(unsigned int, llvm::MVT) const: Assertion `BestRC && "Couldn't find the register class"' failed. +; CHECK: call __muldi3 + ret void + + fail: + ret void +} + +declare void @"three_ints"(i64, i64, i64) addrspace(1) |