[AArch64] update test checks; NFC

The common prefix reduces a bunch of replication; not sure why it
didn't happen before.

1 files changed, 221 insertions, 491 deletions

diff --git a/llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll b/llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
index c4eb10f6726..8e8cee28678 100644
--- a/llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
@@ -429,17 +429,11 @@ entry:
 }
 
 define <2 x float> @test_vfma_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) {
-; GENERIC-LABEL: test_vfma_lane_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmla v0.2s, v1.2s, v2.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfma_lane_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmla v0.2s, v1.2s, v2.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfma_lane_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmla v0.2s, v1.2s, v2.s[1]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> <i32 1, i32 1>
   %0 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %lane, <2 x float> %b, <2 x float> %a)
@@ -449,17 +443,11 @@ entry:
 declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>)
 
 define <4 x float> @test_vfmaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) {
-; GENERIC-LABEL: test_vfmaq_lane_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmla v0.4s, v1.4s, v2.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmaq_lane_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmla v0.4s, v1.4s, v2.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmaq_lane_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmla v0.4s, v1.4s, v2.s[1]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <2 x float> %v, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
   %0 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %lane, <4 x float> %b, <4 x float> %a)
@@ -469,15 +457,10 @@ entry:
 declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>)
 
 define <2 x float> @test_vfma_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) {
-; GENERIC-LABEL: test_vfma_laneq_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmla v0.2s, v1.2s, v2.s[3]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfma_laneq_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmla v0.2s, v1.2s, v2.s[3]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfma_laneq_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmla v0.2s, v1.2s, v2.s[3]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <4 x float> %v, <4 x float> undef, <2 x i32> <i32 3, i32 3>
   %0 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %lane, <2 x float> %b, <2 x float> %a)
@@ -485,15 +468,10 @@ entry:
 }
 
 define <4 x float> @test_vfmaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) {
-; GENERIC-LABEL: test_vfmaq_laneq_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmla v0.4s, v1.4s, v2.s[3]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmaq_laneq_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmla v0.4s, v1.4s, v2.s[3]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmaq_laneq_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmla v0.4s, v1.4s, v2.s[3]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
   %0 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %lane, <4 x float> %b, <4 x float> %a)
@@ -501,17 +479,11 @@ entry:
 }
 
 define <2 x float> @test_vfms_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) {
-; GENERIC-LABEL: test_vfms_lane_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmls v0.2s, v1.2s, v2.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfms_lane_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmls v0.2s, v1.2s, v2.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfms_lane_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmls v0.2s, v1.2s, v2.s[1]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %v
   %lane = shufflevector <2 x float> %sub, <2 x float> undef, <2 x i32> <i32 1, i32 1>
@@ -520,17 +492,11 @@ entry:
 }
 
 define <4 x float> @test_vfmsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) {
-; GENERIC-LABEL: test_vfmsq_lane_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmls v0.4s, v1.4s, v2.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmsq_lane_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmls v0.4s, v1.4s, v2.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmsq_lane_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmls v0.4s, v1.4s, v2.s[1]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %v
   %lane = shufflevector <2 x float> %sub, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
@@ -539,15 +505,10 @@ entry:
 }
 
 define <2 x float> @test_vfms_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) {
-; GENERIC-LABEL: test_vfms_laneq_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmls v0.2s, v1.2s, v2.s[3]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfms_laneq_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmls v0.2s, v1.2s, v2.s[3]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfms_laneq_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmls v0.2s, v1.2s, v2.s[3]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %v
   %lane = shufflevector <4 x float> %sub, <4 x float> undef, <2 x i32> <i32 3, i32 3>
@@ -556,15 +517,10 @@ entry:
 }
 
 define <4 x float> @test_vfmsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) {
-; GENERIC-LABEL: test_vfmsq_laneq_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmls v0.4s, v1.4s, v2.s[3]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmsq_laneq_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmls v0.4s, v1.4s, v2.s[3]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmsq_laneq_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmls v0.4s, v1.4s, v2.s[3]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %v
   %lane = shufflevector <4 x float> %sub, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
@@ -573,17 +529,11 @@ entry:
 }
 
 define <2 x double> @test_vfmaq_lane_f64(<2 x double> %a, <2 x double> %b, <1 x double> %v) {
-; GENERIC-LABEL: test_vfmaq_lane_f64:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmla v0.2d, v1.2d, v2.d[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmaq_lane_f64:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmla v0.2d, v1.2d, v2.d[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmaq_lane_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmla v0.2d, v1.2d, v2.d[0]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <1 x double> %v, <1 x double> undef, <2 x i32> zeroinitializer
   %0 = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %lane, <2 x double> %b, <2 x double> %a)
@@ -593,15 +543,10 @@ entry:
 declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>)
 
 define <2 x double> @test_vfmaq_laneq_f64(<2 x double> %a, <2 x double> %b, <2 x double> %v) {
-; GENERIC-LABEL: test_vfmaq_laneq_f64:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmla v0.2d, v1.2d, v2.d[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmaq_laneq_f64:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmla v0.2d, v1.2d, v2.d[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmaq_laneq_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmla v0.2d, v1.2d, v2.d[1]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 1, i32 1>
   %0 = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %lane, <2 x double> %b, <2 x double> %a)
@@ -609,17 +554,11 @@ entry:
 }
 
 define <2 x double> @test_vfmsq_lane_f64(<2 x double> %a, <2 x double> %b, <1 x double> %v) {
-; GENERIC-LABEL: test_vfmsq_lane_f64:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmls v0.2d, v1.2d, v2.d[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmsq_lane_f64:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmls v0.2d, v1.2d, v2.d[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmsq_lane_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmls v0.2d, v1.2d, v2.d[0]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <1 x double> <double -0.000000e+00>, %v
   %lane = shufflevector <1 x double> %sub, <1 x double> undef, <2 x i32> zeroinitializer
@@ -628,15 +567,10 @@ entry:
 }
 
 define <2 x double> @test_vfmsq_laneq_f64(<2 x double> %a, <2 x double> %b, <2 x double> %v) {
-; GENERIC-LABEL: test_vfmsq_laneq_f64:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmls v0.2d, v1.2d, v2.d[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmsq_laneq_f64:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmls v0.2d, v1.2d, v2.d[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmsq_laneq_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmls v0.2d, v1.2d, v2.d[1]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %v
   %lane = shufflevector <2 x double> %sub, <2 x double> undef, <2 x i32> <i32 1, i32 1>
@@ -1666,17 +1600,11 @@ entry:
 }
 
 define <2 x float> @test_vmul_lane_f32(<2 x float> %a, <2 x float> %v) {
-; GENERIC-LABEL: test_vmul_lane_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmul v0.2s, v0.2s, v1.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmul_lane_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmul v0.2s, v0.2s, v1.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmul_lane_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmul v0.2s, v0.2s, v1.s[1]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> <i32 1, i32 1>
   %mul = fmul <2 x float> %shuffle, %a
@@ -1698,17 +1626,11 @@ entry:
 }
 
 define <4 x float> @test_vmulq_lane_f32(<4 x float> %a, <2 x float> %v) {
-; GENERIC-LABEL: test_vmulq_lane_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmul v0.4s, v0.4s, v1.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulq_lane_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmul v0.4s, v0.4s, v1.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulq_lane_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmul v0.4s, v0.4s, v1.s[1]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
   %mul = fmul <4 x float> %shuffle, %a
@@ -1716,17 +1638,11 @@ entry:
 }
 
 define <2 x double> @test_vmulq_lane_f64(<2 x double> %a, <1 x double> %v) {
-; GENERIC-LABEL: test_vmulq_lane_f64:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmul v0.2d, v0.2d, v1.d[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulq_lane_f64:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmul v0.2d, v0.2d, v1.d[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulq_lane_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmul v0.2d, v0.2d, v1.d[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <1 x double> %v, <1 x double> undef, <2 x i32> zeroinitializer
   %mul = fmul <2 x double> %shuffle, %a
@@ -1734,15 +1650,10 @@ entry:
 }
 
 define <2 x float> @test_vmul_laneq_f32(<2 x float> %a, <4 x float> %v) {
-; GENERIC-LABEL: test_vmul_laneq_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmul v0.2s, v0.2s, v1.s[3]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmul_laneq_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmul v0.2s, v0.2s, v1.s[3]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmul_laneq_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmul v0.2s, v0.2s, v1.s[3]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <4 x float> %v, <4 x float> undef, <2 x i32> <i32 3, i32 3>
   %mul = fmul <2 x float> %shuffle, %a
@@ -1764,15 +1675,10 @@ entry:
 }
 
 define <4 x float> @test_vmulq_laneq_f32(<4 x float> %a, <4 x float> %v) {
-; GENERIC-LABEL: test_vmulq_laneq_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmul v0.4s, v0.4s, v1.s[3]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulq_laneq_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmul v0.4s, v0.4s, v1.s[3]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulq_laneq_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmul v0.4s, v0.4s, v1.s[3]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
   %mul = fmul <4 x float> %shuffle, %a
@@ -1780,15 +1686,10 @@ entry:
 }
 
 define <2 x double> @test_vmulq_laneq_f64(<2 x double> %a, <2 x double> %v) {
-; GENERIC-LABEL: test_vmulq_laneq_f64:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmul v0.2d, v0.2d, v1.d[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulq_laneq_f64:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmul v0.2d, v0.2d, v1.d[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulq_laneq_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmul v0.2d, v0.2d, v1.d[1]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 1, i32 1>
   %mul = fmul <2 x double> %shuffle, %a
@@ -1796,17 +1697,11 @@ entry:
 }
 
 define <2 x float> @test_vmulx_lane_f32(<2 x float> %a, <2 x float> %v) {
-; GENERIC-LABEL: test_vmulx_lane_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmulx v0.2s, v0.2s, v1.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulx_lane_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmulx v0.2s, v0.2s, v1.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulx_lane_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmulx v0.2s, v0.2s, v1.s[1]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> <i32 1, i32 1>
   %vmulx2.i = tail call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %a, <2 x float> %shuffle)
@@ -1814,17 +1709,11 @@ entry:
 }
 
 define <4 x float> @test_vmulxq_lane_f32(<4 x float> %a, <2 x float> %v) {
-; GENERIC-LABEL: test_vmulxq_lane_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmulx v0.4s, v0.4s, v1.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulxq_lane_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmulx v0.4s, v0.4s, v1.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulxq_lane_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmulx v0.4s, v0.4s, v1.s[1]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
   %vmulx2.i = tail call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %a, <4 x float> %shuffle)
@@ -1832,17 +1721,11 @@ entry:
 }
 
 define <2 x double> @test_vmulxq_lane_f64(<2 x double> %a, <1 x double> %v) {
-; GENERIC-LABEL: test_vmulxq_lane_f64:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmulx v0.2d, v0.2d, v1.d[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulxq_lane_f64:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmulx v0.2d, v0.2d, v1.d[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulxq_lane_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmulx v0.2d, v0.2d, v1.d[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <1 x double> %v, <1 x double> undef, <2 x i32> zeroinitializer
   %vmulx2.i = tail call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %a, <2 x double> %shuffle)
@@ -1850,15 +1733,10 @@ entry:
 }
 
 define <2 x float> @test_vmulx_laneq_f32(<2 x float> %a, <4 x float> %v) {
-; GENERIC-LABEL: test_vmulx_laneq_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmulx v0.2s, v0.2s, v1.s[3]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulx_laneq_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmulx v0.2s, v0.2s, v1.s[3]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulx_laneq_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmulx v0.2s, v0.2s, v1.s[3]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <4 x float> %v, <4 x float> undef, <2 x i32> <i32 3, i32 3>
   %vmulx2.i = tail call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %a, <2 x float> %shuffle)
@@ -1866,15 +1744,10 @@ entry:
 }
 
 define <4 x float> @test_vmulxq_laneq_f32(<4 x float> %a, <4 x float> %v) {
-; GENERIC-LABEL: test_vmulxq_laneq_f32:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmulx v0.4s, v0.4s, v1.s[3]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulxq_laneq_f32:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmulx v0.4s, v0.4s, v1.s[3]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulxq_laneq_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmulx v0.4s, v0.4s, v1.s[3]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
   %vmulx2.i = tail call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %a, <4 x float> %shuffle)
@@ -1882,15 +1755,10 @@ entry:
 }
 
 define <2 x double> @test_vmulxq_laneq_f64(<2 x double> %a, <2 x double> %v) {
-; GENERIC-LABEL: test_vmulxq_laneq_f64:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmulx v0.2d, v0.2d, v1.d[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulxq_laneq_f64:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmulx v0.2d, v0.2d, v1.d[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulxq_laneq_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmulx v0.2d, v0.2d, v1.d[1]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 1, i32 1>
   %vmulx2.i = tail call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %a, <2 x double> %shuffle)
@@ -2282,17 +2150,11 @@ entry:
 }
 
 define <2 x float> @test_vfma_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) {
-; GENERIC-LABEL: test_vfma_lane_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmla v0.2s, v1.2s, v2.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfma_lane_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmla v0.2s, v1.2s, v2.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfma_lane_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmla v0.2s, v1.2s, v2.s[0]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> zeroinitializer
   %0 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %lane, <2 x float> %b, <2 x float> %a)
@@ -2300,17 +2162,11 @@ entry:
 }
 
 define <4 x float> @test_vfmaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) {
-; GENERIC-LABEL: test_vfmaq_lane_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmla v0.4s, v1.4s, v2.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmaq_lane_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmla v0.4s, v1.4s, v2.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmaq_lane_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmla v0.4s, v1.4s, v2.s[0]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <2 x float> %v, <2 x float> undef, <4 x i32> zeroinitializer
   %0 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %lane, <4 x float> %b, <4 x float> %a)
@@ -2318,15 +2174,10 @@ entry:
 }
 
 define <2 x float> @test_vfma_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) {
-; GENERIC-LABEL: test_vfma_laneq_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmla v0.2s, v1.2s, v2.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfma_laneq_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmla v0.2s, v1.2s, v2.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfma_laneq_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmla v0.2s, v1.2s, v2.s[0]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <4 x float> %v, <4 x float> undef, <2 x i32> zeroinitializer
   %0 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %lane, <2 x float> %b, <2 x float> %a)
@@ -2334,15 +2185,10 @@ entry:
 }
 
 define <4 x float> @test_vfmaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) {
-; GENERIC-LABEL: test_vfmaq_laneq_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmla v0.4s, v1.4s, v2.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmaq_laneq_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmla v0.4s, v1.4s, v2.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmaq_laneq_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmla v0.4s, v1.4s, v2.s[0]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
   %0 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %lane, <4 x float> %b, <4 x float> %a)
@@ -2350,17 +2196,11 @@ entry:
 }
 
 define <2 x float> @test_vfms_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) {
-; GENERIC-LABEL: test_vfms_lane_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmls v0.2s, v1.2s, v2.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfms_lane_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmls v0.2s, v1.2s, v2.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfms_lane_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmls v0.2s, v1.2s, v2.s[0]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %v
   %lane = shufflevector <2 x float> %sub, <2 x float> undef, <2 x i32> zeroinitializer
@@ -2369,17 +2209,11 @@ entry:
 }
 
 define <4 x float> @test_vfmsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) {
-; GENERIC-LABEL: test_vfmsq_lane_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmls v0.4s, v1.4s, v2.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmsq_lane_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmls v0.4s, v1.4s, v2.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmsq_lane_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmls v0.4s, v1.4s, v2.s[0]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %v
   %lane = shufflevector <2 x float> %sub, <2 x float> undef, <4 x i32> zeroinitializer
@@ -2388,15 +2222,10 @@ entry:
 }
 
 define <2 x float> @test_vfms_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) {
-; GENERIC-LABEL: test_vfms_laneq_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmls v0.2s, v1.2s, v2.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfms_laneq_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmls v0.2s, v1.2s, v2.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfms_laneq_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmls v0.2s, v1.2s, v2.s[0]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %v
   %lane = shufflevector <4 x float> %sub, <4 x float> undef, <2 x i32> zeroinitializer
@@ -2405,15 +2234,10 @@ entry:
 }
 
 define <4 x float> @test_vfmsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) {
-; GENERIC-LABEL: test_vfmsq_laneq_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmls v0.4s, v1.4s, v2.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmsq_laneq_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmls v0.4s, v1.4s, v2.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmsq_laneq_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmls v0.4s, v1.4s, v2.s[0]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %v
   %lane = shufflevector <4 x float> %sub, <4 x float> undef, <4 x i32> zeroinitializer
@@ -2422,15 +2246,10 @@ entry:
 }
 
 define <2 x double> @test_vfmaq_laneq_f64_0(<2 x double> %a, <2 x double> %b, <2 x double> %v) {
-; GENERIC-LABEL: test_vfmaq_laneq_f64_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmla v0.2d, v1.2d, v2.d[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmaq_laneq_f64_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmla v0.2d, v1.2d, v2.d[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmaq_laneq_f64_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmla v0.2d, v1.2d, v2.d[0]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> zeroinitializer
   %0 = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %lane, <2 x double> %b, <2 x double> %a)
@@ -2438,15 +2257,10 @@ entry:
 }
 
 define <2 x double> @test_vfmsq_laneq_f64_0(<2 x double> %a, <2 x double> %b, <2 x double> %v) {
-; GENERIC-LABEL: test_vfmsq_laneq_f64_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmls v0.2d, v1.2d, v2.d[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfmsq_laneq_f64_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmls v0.2d, v1.2d, v2.d[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfmsq_laneq_f64_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmls v0.2d, v1.2d, v2.d[0]
+; CHECK-NEXT:    ret
 entry:
   %sub = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %v
   %lane = shufflevector <2 x double> %sub, <2 x double> undef, <2 x i32> zeroinitializer
@@ -3363,17 +3177,11 @@ entry:
 }
 
 define <2 x float> @test_vmul_lane_f32_0(<2 x float> %a, <2 x float> %v) {
-; GENERIC-LABEL: test_vmul_lane_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmul v0.2s, v0.2s, v1.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmul_lane_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmul v0.2s, v0.2s, v1.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmul_lane_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmul v0.2s, v0.2s, v1.s[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> zeroinitializer
   %mul = fmul <2 x float> %shuffle, %a
@@ -3381,17 +3189,11 @@ entry:
 }
 
 define <4 x float> @test_vmulq_lane_f32_0(<4 x float> %a, <2 x float> %v) {
-; GENERIC-LABEL: test_vmulq_lane_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmul v0.4s, v0.4s, v1.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulq_lane_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmul v0.4s, v0.4s, v1.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulq_lane_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmul v0.4s, v0.4s, v1.s[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <4 x i32> zeroinitializer
   %mul = fmul <4 x float> %shuffle, %a
@@ -3399,15 +3201,10 @@ entry:
 }
 
 define <2 x float> @test_vmul_laneq_f32_0(<2 x float> %a, <4 x float> %v) {
-; GENERIC-LABEL: test_vmul_laneq_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmul v0.2s, v0.2s, v1.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmul_laneq_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmul v0.2s, v0.2s, v1.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmul_laneq_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmul v0.2s, v0.2s, v1.s[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <4 x float> %v, <4 x float> undef, <2 x i32> zeroinitializer
   %mul = fmul <2 x float> %shuffle, %a
@@ -3429,15 +3226,10 @@ entry:
 }
 
 define <4 x float> @test_vmulq_laneq_f32_0(<4 x float> %a, <4 x float> %v) {
-; GENERIC-LABEL: test_vmulq_laneq_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmul v0.4s, v0.4s, v1.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulq_laneq_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmul v0.4s, v0.4s, v1.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulq_laneq_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmul v0.4s, v0.4s, v1.s[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
   %mul = fmul <4 x float> %shuffle, %a
@@ -3445,15 +3237,10 @@ entry:
 }
 
 define <2 x double> @test_vmulq_laneq_f64_0(<2 x double> %a, <2 x double> %v) {
-; GENERIC-LABEL: test_vmulq_laneq_f64_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmul v0.2d, v0.2d, v1.d[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulq_laneq_f64_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmul v0.2d, v0.2d, v1.d[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulq_laneq_f64_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmul v0.2d, v0.2d, v1.d[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> zeroinitializer
   %mul = fmul <2 x double> %shuffle, %a
@@ -3461,17 +3248,11 @@ entry:
 }
 
 define <2 x float> @test_vmulx_lane_f32_0(<2 x float> %a, <2 x float> %v) {
-; GENERIC-LABEL: test_vmulx_lane_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmulx v0.2s, v0.2s, v1.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulx_lane_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmulx v0.2s, v0.2s, v1.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulx_lane_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmulx v0.2s, v0.2s, v1.s[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> zeroinitializer
   %vmulx2.i = tail call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %a, <2 x float> %shuffle)
@@ -3479,17 +3260,11 @@ entry:
 }
 
 define <4 x float> @test_vmulxq_lane_f32_0(<4 x float> %a, <2 x float> %v) {
-; GENERIC-LABEL: test_vmulxq_lane_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmulx v0.4s, v0.4s, v1.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulxq_lane_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmulx v0.4s, v0.4s, v1.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulxq_lane_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmulx v0.4s, v0.4s, v1.s[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <4 x i32> zeroinitializer
   %vmulx2.i = tail call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %a, <4 x float> %shuffle)
@@ -3497,17 +3272,11 @@ entry:
 }
 
 define <2 x double> @test_vmulxq_lane_f64_0(<2 x double> %a, <1 x double> %v) {
-; GENERIC-LABEL: test_vmulxq_lane_f64_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d1 killed $d1 def $q1
-; GENERIC-NEXT:    fmulx v0.2d, v0.2d, v1.d[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulxq_lane_f64_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d1 killed $d1 def $q1
-; EXYNOSM3-NEXT:    fmulx v0.2d, v0.2d, v1.d[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulxq_lane_f64_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT:    fmulx v0.2d, v0.2d, v1.d[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <1 x double> %v, <1 x double> undef, <2 x i32> zeroinitializer
   %vmulx2.i = tail call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %a, <2 x double> %shuffle)
@@ -3515,15 +3284,10 @@ entry:
 }
 
 define <2 x float> @test_vmulx_laneq_f32_0(<2 x float> %a, <4 x float> %v) {
-; GENERIC-LABEL: test_vmulx_laneq_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmulx v0.2s, v0.2s, v1.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulx_laneq_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmulx v0.2s, v0.2s, v1.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulx_laneq_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmulx v0.2s, v0.2s, v1.s[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <4 x float> %v, <4 x float> undef, <2 x i32> zeroinitializer
   %vmulx2.i = tail call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %a, <2 x float> %shuffle)
@@ -3531,15 +3295,10 @@ entry:
 }
 
 define <4 x float> @test_vmulxq_laneq_f32_0(<4 x float> %a, <4 x float> %v) {
-; GENERIC-LABEL: test_vmulxq_laneq_f32_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmulx v0.4s, v0.4s, v1.s[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulxq_laneq_f32_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmulx v0.4s, v0.4s, v1.s[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulxq_laneq_f32_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmulx v0.4s, v0.4s, v1.s[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
   %vmulx2.i = tail call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %a, <4 x float> %shuffle)
@@ -3547,15 +3306,10 @@ entry:
 }
 
 define <2 x double> @test_vmulxq_laneq_f64_0(<2 x double> %a, <2 x double> %v) {
-; GENERIC-LABEL: test_vmulxq_laneq_f64_0:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmulx v0.2d, v0.2d, v1.d[0]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vmulxq_laneq_f64_0:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmulx v0.2d, v0.2d, v1.d[0]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vmulxq_laneq_f64_0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmulx v0.2d, v0.2d, v1.d[0]
+; CHECK-NEXT:    ret
 entry:
   %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> zeroinitializer
   %vmulx2.i = tail call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %a, <2 x double> %shuffle)
@@ -3563,17 +3317,11 @@ entry:
 }
 
 define <4 x float> @optimize_dup(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %v) {
-; GENERIC-LABEL: optimize_dup:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmla v0.4s, v1.4s, v3.s[3]
-; GENERIC-NEXT:    fmls v0.4s, v2.4s, v3.s[3]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: optimize_dup:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmla v0.4s, v1.4s, v3.s[3]
-; EXYNOSM3-NEXT:    fmls v0.4s, v2.4s, v3.s[3]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: optimize_dup:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmla v0.4s, v1.4s, v3.s[3]
+; CHECK-NEXT:    fmls v0.4s, v2.4s, v3.s[3]
+; CHECK-NEXT:    ret
 entry:
   %lane1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
   %0 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %lane1, <4 x float> %b, <4 x float> %a)
@@ -3584,17 +3332,11 @@ entry:
 }
 
 define <4 x float> @no_optimize_dup(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %v) {
-; GENERIC-LABEL: no_optimize_dup:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    fmla v0.4s, v1.4s, v3.s[3]
-; GENERIC-NEXT:    fmls v0.4s, v2.4s, v3.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: no_optimize_dup:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    fmla v0.4s, v1.4s, v3.s[3]
-; EXYNOSM3-NEXT:    fmls v0.4s, v2.4s, v3.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: no_optimize_dup:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmla v0.4s, v1.4s, v3.s[3]
+; CHECK-NEXT:    fmls v0.4s, v2.4s, v3.s[1]
+; CHECK-NEXT:    ret
 entry:
   %lane1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
   %0 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %lane1, <4 x float> %b, <4 x float> %a)
@@ -3605,17 +3347,11 @@ entry:
 }
 
 define <2 x float> @test_vfma_lane_simdinstr_opt_pass_caching_a57(<2 x float> %a, <2 x float> %b, <2 x float> %v) "target-cpu"="cortex-a57" {
-; GENERIC-LABEL: test_vfma_lane_simdinstr_opt_pass_caching_a57:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmla v0.2s, v1.2s, v2.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfma_lane_simdinstr_opt_pass_caching_a57:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmla v0.2s, v1.2s, v2.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfma_lane_simdinstr_opt_pass_caching_a57:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmla v0.2s, v1.2s, v2.s[1]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> <i32 1, i32 1>
   %0 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %lane, <2 x float> %b, <2 x float> %a)
@@ -3623,17 +3359,11 @@ entry:
 }
 
 define <2 x float> @test_vfma_lane_simdinstr_opt_pass_caching_m3(<2 x float> %a, <2 x float> %b, <2 x float> %v) "target-cpu"="exynos-m3" {
-; GENERIC-LABEL: test_vfma_lane_simdinstr_opt_pass_caching_m3:
-; GENERIC:       // %bb.0: // %entry
-; GENERIC-NEXT:    // kill: def $d2 killed $d2 def $q2
-; GENERIC-NEXT:    fmla v0.2s, v1.2s, v2.s[1]
-; GENERIC-NEXT:    ret
-;
-; EXYNOSM3-LABEL: test_vfma_lane_simdinstr_opt_pass_caching_m3:
-; EXYNOSM3:       // %bb.0: // %entry
-; EXYNOSM3-NEXT:    // kill: def $d2 killed $d2 def $q2
-; EXYNOSM3-NEXT:    fmla v0.2s, v1.2s, v2.s[1]
-; EXYNOSM3-NEXT:    ret
+; CHECK-LABEL: test_vfma_lane_simdinstr_opt_pass_caching_m3:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT:    fmla v0.2s, v1.2s, v2.s[1]
+; CHECK-NEXT:    ret
 entry:
   %lane = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> <i32 1, i32 1>
   %0 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %lane, <2 x float> %b, <2 x float> %a)