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authorJessica Paquette <jpaquette@apple.com>2019-04-01 22:19:13 +0000
committerJessica Paquette <jpaquette@apple.com>2019-04-01 22:19:13 +0000
commite44c20a68d2659e2a3dae8aa8f8c61c36145b1f7 (patch)
tree86ebad9218e6e6d2b11666821eee5f2ae61f41e6 /llvm/test/CodeGen
parentdd245c4f8fe0e2c1222fd0360a7febc752db9417 (diff)
downloadbcm5719-llvm-e44c20a68d2659e2a3dae8aa8f8c61c36145b1f7.tar.gz
bcm5719-llvm-e44c20a68d2659e2a3dae8aa8f8c61c36145b1f7.zip
[AArch64][GlobalISe] Select STRQui for stores into v264s instead of scalarizing
This improves selection for vector stores into v2s64s. Before we just scalarized them, but we can just use a STRQui instead. Differential Revision: https://reviews.llvm.org/D60083 llvm-svn: 357432
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir6
-rw-r--r--llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir22
2 files changed, 24 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
index 33ec198d37e..5a5cfb9c048 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
@@ -42,10 +42,8 @@ body: |
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s64)
; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8)
- ; CHECK: G_STORE [[LOAD]](s64), [[COPY1]](p0) :: (store 8, align 16)
- ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
- ; CHECK: [[GEP1:%[0-9]+]]:_(p0) = G_GEP [[COPY1]], [[C1]](s64)
- ; CHECK: G_STORE [[LOAD1]](s64), [[GEP1]](p0) :: (store 8)
+ ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64)
+ ; CHECK: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[COPY1]](p0) :: (store 16)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(<2 x s64>) = G_LOAD %0(p0) :: (load 16)
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
index c4e93af1c85..0e16aa72187 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
@@ -29,6 +29,7 @@
define void @store_gep_8_s32_fpr(i32* %addr) { ret void }
define void @store_v2s32(i64 *%addr) { ret void }
+ define void @store_v2s64(i64 *%addr) { ret void }
...
---
@@ -418,3 +419,24 @@ body: |
G_STORE %1, %0 :: (store 8 into %ir.addr)
...
+---
+name: store_v2s64
+legalized: true
+regBankSelected: true
+
+registers:
+ - { id: 0, class: gpr }
+ - { id: 1, class: fpr }
+
+body: |
+ bb.0:
+ liveins: $x0, $d1
+ ; CHECK-LABEL: name: store_v2s64
+ ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
+ ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
+ ; CHECK: STRQui [[COPY1]], [[COPY]], 0 :: (store 16 into %ir.addr, align 8)
+ %0(p0) = COPY $x0
+ %1(<2 x s64>) = COPY $q1
+ G_STORE %1, %0 :: (store 16 into %ir.addr, align 8)
+
+...
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