diff options
| author | Eric Christopher <echristo@gmail.com> | 2017-08-31 05:56:16 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gmail.com> | 2017-08-31 05:56:16 +0000 |
| commit | e42ac21499c103a4b1052e759618ecbd35207d6c (patch) | |
| tree | 7b878aad86223de56930fa0b6be5e5fa635efca8 /llvm/test/CodeGen | |
| parent | 376f1bd73cdc8219b288400798e1f0d205d2ca77 (diff) | |
| download | bcm5719-llvm-e42ac21499c103a4b1052e759618ecbd35207d6c.tar.gz bcm5719-llvm-e42ac21499c103a4b1052e759618ecbd35207d6c.zip | |
Temporarily revert "Update branch coalescing to be a PowerPC specific pass"
From comments and code review it wasn't intended to be enabled by default yet.
This reverts commit r311588.
llvm-svn: 312214
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/branch_coalesce.ll | 57 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/select-i1-vs-i1.ll | 8 |
2 files changed, 21 insertions, 44 deletions
diff --git a/llvm/test/CodeGen/PowerPC/branch_coalesce.ll b/llvm/test/CodeGen/PowerPC/branch_coalesce.ll index 6ec9eed6935..deb6d898c2e 100644 --- a/llvm/test/CodeGen/PowerPC/branch_coalesce.ll +++ b/llvm/test/CodeGen/PowerPC/branch_coalesce.ll @@ -1,19 +1,26 @@ -; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs -disable-ppc-branch-coalesce < %s | FileCheck --check-prefix=CHECK-NOCOALESCE %s -; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs -disable-ppc-branch-coalesce < %s | FileCheck --check-prefix=CHECK-NOCOALESCE %s +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs -enable-branch-coalesce=true < %s | FileCheck %s +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs -enable-branch-coalesce=true < %s | FileCheck %s ; Function Attrs: nounwind define double @testBranchCoal(double %a, double %b, double %c, i32 %x) { +entry: + %test = icmp eq i32 %x, 0 + %tmp1 = select i1 %test, double %a, double 2.000000e-03 + %tmp2 = select i1 %test, double %b, double 0.000000e+00 + %tmp3 = select i1 %test, double %c, double 5.000000e-03 -; CHECK-LABEL: @testBranchCoal + %res1 = fadd double %tmp1, %tmp2 + %result = fadd double %res1, %tmp3 + ret double %result + +; CHECK-LABEL: @testBranchCoal ; CHECK: cmplwi [[CMPR:[0-7]+]], 6, 0 ; CHECK: beq [[CMPR]], .LBB[[LAB1:[0-9_]+]] ; CHECK-DAG: addis [[LD1REG:[0-9]+]], 2, .LCPI0_0@toc@ha ; CHECK-DAG: addis [[LD2REG:[0-9]+]], 2, .LCPI0_1@toc@ha ; CHECK-DAG: xxlxor 2, 2, 2 -; CHECK-NOT: beq -; CHECK-DAG: addi [[LD1BASE:[0-9]+]], [[LD1REG]] +; CHECK-NOT: beq +; CHECK-DAG: addi [[LD1BASE:[0-9]+]], [[LD1REG]] ; CHECK-DAG: addi [[LD2BASE:[0-9]+]], [[LD2REG]] ; CHECK-DAG: lxsdx 1, 0, [[LD1BASE]] ; CHECK-DAG: lxsdx 3, 0, [[LD2BASE]] @@ -21,40 +28,4 @@ define double @testBranchCoal(double %a, double %b, double %c, i32 %x) { ; CHECK: xsadddp 0, 1, 2 ; CHECK: xsadddp 1, 0, 3 ; CHECK: blr - -; CHECK-NOCOALESCE-LABEL: testBranchCoal: -; CHECK-NOCOALESCE: # BB#0: # %entry -; CHECK-NOCOALESCE-NEXT: cmplwi 0, 6, 0 -; CHECK-NOCOALESCE-NEXT: bne 0, .LBB0_5 -; CHECK-NOCOALESCE-NEXT: # BB#1: # %entry -; CHECK-NOCOALESCE-NEXT: bne 0, .LBB0_6 -; CHECK-NOCOALESCE-NEXT: .LBB0_2: # %entry -; CHECK-NOCOALESCE-NEXT: beq 0, .LBB0_4 -; CHECK-NOCOALESCE-NEXT: .LBB0_3: # %entry -; CHECK-NOCOALESCE-NEXT: addis 3, 2, .LCPI0_1@toc@ha -; CHECK-NOCOALESCE-NEXT: addi 3, 3, .LCPI0_1@toc@l -; CHECK-NOCOALESCE-NEXT: lxsdx 3, 0, 3 -; CHECK-NOCOALESCE-NEXT: .LBB0_4: # %entry -; CHECK-NOCOALESCE-NEXT: xsadddp 0, 1, 2 -; CHECK-NOCOALESCE-NEXT: xsadddp 1, 0, 3 -; CHECK-NOCOALESCE-NEXT: blr -; CHECK-NOCOALESCE-NEXT: .LBB0_5: # %entry -; CHECK-NOCOALESCE-NEXT: addis 3, 2, .LCPI0_0@toc@ha -; CHECK-NOCOALESCE-NEXT: addi 3, 3, .LCPI0_0@toc@l -; CHECK-NOCOALESCE-NEXT: lxsdx 1, 0, 3 -; CHECK-NOCOALESCE-NEXT: beq 0, .LBB0_2 -; CHECK-NOCOALESCE-NEXT: .LBB0_6: # %entry -; CHECK-NOCOALESCE-NEXT: xxlxor 2, 2, 2 -; CHECK-NOCOALESCE-NEXT: bne 0, .LBB0_3 -; CHECK-NOCOALESCE-NEXT: b .LBB0_4 - entry: - - %test = icmp eq i32 %x, 0 - %tmp1 = select i1 %test, double %a, double 2.000000e-03 - %tmp2 = select i1 %test, double %b, double 0.000000e+00 - %tmp3 = select i1 %test, double %c, double 5.000000e-03 - - %res1 = fadd double %tmp1, %tmp2 - %result = fadd double %res1, %tmp3 - ret double %result } diff --git a/llvm/test/CodeGen/PowerPC/select-i1-vs-i1.ll b/llvm/test/CodeGen/PowerPC/select-i1-vs-i1.ll index 9026b48edb8..b7beb8165fd 100644 --- a/llvm/test/CodeGen/PowerPC/select-i1-vs-i1.ll +++ b/llvm/test/CodeGen/PowerPC/select-i1-vs-i1.ll @@ -1026,6 +1026,10 @@ entry: %cond = select i1 %cmp3, ppc_fp128 %a1, ppc_fp128 %a2 ret ppc_fp128 %cond +; FIXME: Because of the way that the late SELECT_* pseudo-instruction expansion +; works, we end up with two blocks with the same predicate. These could be +; combined. + ; CHECK-LABEL: @testppc_fp128eq ; CHECK-DAG: fcmpu {{[0-9]+}}, 6, 8 ; CHECK-DAG: fcmpu {{[0-9]+}}, 5, 7 @@ -1036,8 +1040,10 @@ entry: ; CHECK: crxor [[REG3:[0-9]+]], [[REG2]], [[REG1]] ; CHECK: bc 12, [[REG3]], .LBB[[BB1:[0-9_]+]] ; CHECK: fmr 11, 9 -; CHECK: fmr 12, 10 ; CHECK: .LBB[[BB1]]: +; CHECK: bc 12, [[REG3]], .LBB[[BB2:[0-9_]+]] +; CHECK: fmr 12, 10 +; CHECK: .LBB[[BB2]]: ; CHECK-DAG: fmr 1, 11 ; CHECK-DAG: fmr 2, 12 ; CHECK: blr |

