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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-05 16:25:18 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-05 16:25:18 +0000 |
| commit | e31ab94e972f4a847f2312ffcdc71291ca7b2325 (patch) | |
| tree | 4e789b6df9e371e9ce23bbee295952bd7cec1e6d /llvm/test/CodeGen | |
| parent | 71272e6d4eec697b0dcbc2b5e36f01bf2d0785f6 (diff) | |
| download | bcm5719-llvm-e31ab94e972f4a847f2312ffcdc71291ca7b2325.tar.gz bcm5719-llvm-e31ab94e972f4a847f2312ffcdc71291ca7b2325.zip | |
AMDGPU/GlobalISel: Add InstrMapping for G_EXTRACT
llvm-svn: 326715
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir new file mode 100644 index 00000000000..550d38cfe9f --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir @@ -0,0 +1,31 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s +# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s + +--- +name: extract_lo32_i64_s +legalized: true + +body: | + bb.0: + liveins: $sgpr0_sgpr1 + ; CHECK-LABEL: name: extract_lo32_i64_s + ; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1 + ; CHECK: [[EXTRACT:%[0-9]+]]:sgpr(s32) = G_EXTRACT [[COPY]](s64), 0 + %0:_(s64) = COPY $sgpr0_sgpr1 + %1:_(s32) = G_EXTRACT %0, 0 +... + +--- +name: extract_lo32_i64_v +legalized: true + +body: | + bb.0: + liveins: $vgpr0_vgpr1 + ; CHECK-LABEL: name: extract_lo32_i64_v + ; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1 + ; CHECK: [[EXTRACT:%[0-9]+]]:vgpr(s32) = G_EXTRACT [[COPY]](s64), 0 + %0:_(s64) = COPY $vgpr0_vgpr1 + %1:_(s32) = G_EXTRACT %0, 0 +... |
