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| author | Craig Topper <craig.topper@intel.com> | 2018-10-16 22:29:36 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-10-16 22:29:36 +0000 |
| commit | e0a992918b54c422119fa2b8046cdf8b9b327b38 (patch) | |
| tree | 292f9733658f1d37d118f28d90e07fb7b6b38b64 /llvm/test/CodeGen | |
| parent | af67fe6aef3b7afa148b3d9b1fea172605a153de (diff) | |
| download | bcm5719-llvm-e0a992918b54c422119fa2b8046cdf8b9b327b38.tar.gz bcm5719-llvm-e0a992918b54c422119fa2b8046cdf8b9b327b38.zip | |
[X86] Match (cmp (and (shr X, C), mask), 0) to BEXTR+TEST.
Without this we match the CMP+AND to a TEST and then match the SHR separately. I'm trusting analyzeCompare to remove the TEST during the peephole pass. Otherwise we need to check the flag users to see if they only use the Z flag.
This recovers a case lost by r344270.
Differential Revision: https://reviews.llvm.org/D53310
llvm-svn: 344649
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/tbm_patterns.ll | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/tbm_patterns.ll b/llvm/test/CodeGen/X86/tbm_patterns.ll index 6865cc5a0ef..2b335ea4268 100644 --- a/llvm/test/CodeGen/X86/tbm_patterns.ll +++ b/llvm/test/CodeGen/X86/tbm_patterns.ll @@ -53,8 +53,7 @@ define i32 @test_x86_tbm_bextri_u32_z2(i32 %a, i32 %b, i32 %c) nounwind { ; CHECK-LABEL: test_x86_tbm_bextri_u32_z2: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %esi, %eax -; CHECK-NEXT: shrl $4, %edi -; CHECK-NEXT: testl $4095, %edi # imm = 0xFFF +; CHECK-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04 ; CHECK-NEXT: cmovnel %edx, %eax ; CHECK-NEXT: retq %t0 = lshr i32 %a, 4 @@ -114,8 +113,7 @@ define i64 @test_x86_tbm_bextri_u64_z2(i64 %a, i64 %b, i64 %c) nounwind { ; CHECK-LABEL: test_x86_tbm_bextri_u64_z2: ; CHECK: # %bb.0: ; CHECK-NEXT: movq %rsi, %rax -; CHECK-NEXT: shrl $4, %edi -; CHECK-NEXT: testl $4095, %edi # imm = 0xFFF +; CHECK-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04 ; CHECK-NEXT: cmovneq %rdx, %rax ; CHECK-NEXT: retq %t0 = lshr i64 %a, 4 |
