diff options
author | Mandeep Singh Grang <mgrang@codeaurora.org> | 2016-10-24 18:57:55 +0000 |
---|---|---|
committer | Mandeep Singh Grang <mgrang@codeaurora.org> | 2016-10-24 18:57:55 +0000 |
commit | da99e33ae3d93302a7395f6c2bbe8f69cafc717a (patch) | |
tree | f87342059f5d84ca679e3ea3b2f05380a3717386 /llvm/test/CodeGen | |
parent | 16e9b944e927c3d8a8f259306735fea37891ea1e (diff) | |
download | bcm5719-llvm-da99e33ae3d93302a7395f6c2bbe8f69cafc717a.tar.gz bcm5719-llvm-da99e33ae3d93302a7395f6c2bbe8f69cafc717a.zip |
[llvm] Remove redundant --check-prefix=CHECK from tests
Reviewers: MatzeB, mcrosier, rengolin
Differential Revision: https://reviews.llvm.org/D25894
llvm-svn: 285003
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r-- | llvm/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/build-attributes-fn-attr0.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/build-attributes-fn-attr1.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/build-attributes-fn-attr2.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/build-attributes-fn-attr3.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/build-attributes-fn-attr4.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/build-attributes-fn-attr6.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/smml.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/bitcast-i256.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/code_placement_loop_rotation3.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/dagcombine-buildvector.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/x32-movtopush64.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/xor-select-i1-combine.ll | 2 |
13 files changed, 13 insertions, 13 deletions
diff --git a/llvm/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll b/llvm/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll index 2170e4b902d..51c32b409db 100644 --- a/llvm/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll +++ b/llvm/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll @@ -4,7 +4,7 @@ ; test cases have been minimized as much as possible, but still most of the test ; cases could break if instruction scheduling heuristics for cortex-a53 change ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=1 -stats 2>&1 \ -; RUN: | FileCheck %s --check-prefix CHECK +; RUN: | FileCheck %s ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=0 -stats 2>&1 \ ; RUN: | FileCheck %s --check-prefix CHECK-NOWORKAROUND ; The following run lines are just to verify whether or not this pass runs by diff --git a/llvm/test/CodeGen/ARM/build-attributes-fn-attr0.ll b/llvm/test/CodeGen/ARM/build-attributes-fn-attr0.ll index 2fb3e032e5d..edb0bdd7949 100644 --- a/llvm/test/CodeGen/ARM/build-attributes-fn-attr0.ll +++ b/llvm/test/CodeGen/ARM/build-attributes-fn-attr0.ll @@ -5,7 +5,7 @@ ; true when the compilation unit does not have any functions (i.e. the ; attributes are consistent), which is what we check with this regression test. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 2 ; CHECK: .eabi_attribute 21, 0 diff --git a/llvm/test/CodeGen/ARM/build-attributes-fn-attr1.ll b/llvm/test/CodeGen/ARM/build-attributes-fn-attr1.ll index 4d6ce7c9756..65fc8ffc942 100644 --- a/llvm/test/CodeGen/ARM/build-attributes-fn-attr1.ll +++ b/llvm/test/CodeGen/ARM/build-attributes-fn-attr1.ll @@ -4,7 +4,7 @@ ; attributes values. This checks the "default" behaviour when these FP function ; attributes are not set at all. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 1 ; CHECK: .eabi_attribute 21, 1 diff --git a/llvm/test/CodeGen/ARM/build-attributes-fn-attr2.ll b/llvm/test/CodeGen/ARM/build-attributes-fn-attr2.ll index 0272d613991..b642882413b 100644 --- a/llvm/test/CodeGen/ARM/build-attributes-fn-attr2.ll +++ b/llvm/test/CodeGen/ARM/build-attributes-fn-attr2.ll @@ -4,7 +4,7 @@ ; functions have consistent function attributes values. ; Here we test correct output for no-trapping-math=false -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 21, 1 diff --git a/llvm/test/CodeGen/ARM/build-attributes-fn-attr3.ll b/llvm/test/CodeGen/ARM/build-attributes-fn-attr3.ll index a454abac3b5..7f70c44c78f 100644 --- a/llvm/test/CodeGen/ARM/build-attributes-fn-attr3.ll +++ b/llvm/test/CodeGen/ARM/build-attributes-fn-attr3.ll @@ -4,7 +4,7 @@ ; functions have consistent function attributes values. ; Here we check values no-trapping-math=true and denormal-fp-math=ieee. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 1 ; CHECK: .eabi_attribute 21, 0 diff --git a/llvm/test/CodeGen/ARM/build-attributes-fn-attr4.ll b/llvm/test/CodeGen/ARM/build-attributes-fn-attr4.ll index 6d2faac0052..e97dd0a2e45 100644 --- a/llvm/test/CodeGen/ARM/build-attributes-fn-attr4.ll +++ b/llvm/test/CodeGen/ARM/build-attributes-fn-attr4.ll @@ -4,7 +4,7 @@ ; attributes values. ; Here we check the denormal-fp-math=positive-zero value. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 0 diff --git a/llvm/test/CodeGen/ARM/build-attributes-fn-attr6.ll b/llvm/test/CodeGen/ARM/build-attributes-fn-attr6.ll index 57443b0af0d..554b72cc323 100644 --- a/llvm/test/CodeGen/ARM/build-attributes-fn-attr6.ll +++ b/llvm/test/CodeGen/ARM/build-attributes-fn-attr6.ll @@ -4,7 +4,7 @@ ; functions have consistent function attributes values. Here we check two ; functions have inconsistent values, and that a default is returned. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 1 diff --git a/llvm/test/CodeGen/ARM/smml.ll b/llvm/test/CodeGen/ARM/smml.ll index 1d6273ca204..aa093192f2b 100644 --- a/llvm/test/CodeGen/ARM/smml.ll +++ b/llvm/test/CodeGen/ARM/smml.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=CHECK +; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s ; RUN: llc -mtriple=armv6-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V6 ; RUN: llc -mtriple=armv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V7 ; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s -check-prefix=CHECK-THUMB diff --git a/llvm/test/CodeGen/X86/bitcast-i256.ll b/llvm/test/CodeGen/X86/bitcast-i256.ll index 85ac2fed6fa..87f1057d16b 100644 --- a/llvm/test/CodeGen/X86/bitcast-i256.ll +++ b/llvm/test/CodeGen/X86/bitcast-i256.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i < %s | FileCheck %s --check-prefix CHECK +; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i < %s | FileCheck %s define i256 @foo(<8 x i32> %a) { %r = bitcast <8 x i32> %a to i256 diff --git a/llvm/test/CodeGen/X86/code_placement_loop_rotation3.ll b/llvm/test/CodeGen/X86/code_placement_loop_rotation3.ll index 6a5b743ef8a..b3f06b7cf48 100644 --- a/llvm/test/CodeGen/X86/code_placement_loop_rotation3.ll +++ b/llvm/test/CodeGen/X86/code_placement_loop_rotation3.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -force-precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK +; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -force-precise-rotation-cost < %s | FileCheck %s define void @bar() { ; Test that all edges in the loop chain are fall through with profile data. diff --git a/llvm/test/CodeGen/X86/dagcombine-buildvector.ll b/llvm/test/CodeGen/X86/dagcombine-buildvector.ll index 5922b1c810a..d60fb734e68 100644 --- a/llvm/test/CodeGen/X86/dagcombine-buildvector.ll +++ b/llvm/test/CodeGen/X86/dagcombine-buildvector.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown -mcpu=penryn | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=i686-unknown -mcpu=penryn | FileCheck %s ; Shows a dag combine bug that will generate an illegal build vector ; with v2i64 build_vector i32, i32. diff --git a/llvm/test/CodeGen/X86/x32-movtopush64.ll b/llvm/test/CodeGen/X86/x32-movtopush64.ll index d31628d7ba5..ba22fa9b99e 100644 --- a/llvm/test/CodeGen/X86/x32-movtopush64.ll +++ b/llvm/test/CodeGen/X86/x32-movtopush64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=CHECK +; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s declare void @bar(i32*, i32*, i32*, i32*, i32*, i64*, i32, i32, i32) diff --git a/llvm/test/CodeGen/X86/xor-select-i1-combine.ll b/llvm/test/CodeGen/X86/xor-select-i1-combine.ll index d270afce815..6507ddcc769 100644 --- a/llvm/test/CodeGen/X86/xor-select-i1-combine.ll +++ b/llvm/test/CodeGen/X86/xor-select-i1-combine.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -;RUN: llc < %s -O2 -mattr=+avx512f -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK +;RUN: llc < %s -O2 -mattr=+avx512f -mtriple=x86_64-unknown | FileCheck %s @n = common global i32 0, align 4 @m = common global i32 0, align 4 |