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author | Bob Wilson <bob.wilson@apple.com> | 2010-06-04 00:04:02 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2010-06-04 00:04:02 +0000 |
commit | d8a9a047390f33c4467595bf149970497f97542c (patch) | |
tree | 914faa2a304709051140f7bd3c79f1ff1fffc1de /llvm/test/CodeGen | |
parent | e288fee95930fb0a3911900d8b38f4780f4f02bb (diff) | |
download | bcm5719-llvm-d8a9a047390f33c4467595bf149970497f97542c.tar.gz bcm5719-llvm-d8a9a047390f33c4467595bf149970497f97542c.zip |
For NEON vectors with 32- or 64-bit elements, select BUILD_VECTORs and
VECTOR_SHUFFLEs to REG_SEQUENCE instructions. The standard ISD::BUILD_VECTOR
node corresponds closely to REG_SEQUENCE but I couldn't use it here because
its operands do not get legalized. That is pretty awful, but I guess it
makes sense for other targets. Instead, I have added an ARM-specific version
of BUILD_VECTOR that will have its operands properly legalized.
This fixes the rest of Radar 7872877.
llvm-svn: 105439
Diffstat (limited to 'llvm/test/CodeGen')
0 files changed, 0 insertions, 0 deletions