Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic.

llvm-svn: 35678

1 files changed, 14 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/Generic/bit-intrinsics.ll b/llvm/test/CodeGen/Generic/bit-intrinsics.ll
new file mode 100644
index 00000000000..a260421772d
--- /dev/null
+++ b/llvm/test/CodeGen/Generic/bit-intrinsics.ll
@@ -0,0 +1,14 @@
+; Make sure this testcase is supported by all code generators. Either the
+; intrinsic is supported natively or IntrinsicLowering provides it.
+; RUN: llvm-as < %s | llc
+
+
+declare i32 @llvm.bit.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo)
+declare i16 @llvm.bit.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo)
+define i32 @bit_part_select(i32 %A, i16 %B) {
+  %a = call i32 @llvm.bit.part.select.i32.i32(i32 %A, i32 8, i32 0)
+  %b = call i16 @llvm.bit.part.select.i16.i16(i16 %B, i32 8, i32 0)
+  %c = zext i16 %b to i32
+  %d = add i32 %a, %c
+  ret i32 %d
+}