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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2014-08-04 13:53:40 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2014-08-04 13:53:40 +0000 |
| commit | cc9909b881b04d496b70ff44854d99d06e584dfc (patch) | |
| tree | 5bf59b46a29803856d874ddcf3f6b9287b47c22c /llvm/test/CodeGen | |
| parent | c36c6abc45101933252d9311e3f7ad99fbcecb8a (diff) | |
| download | bcm5719-llvm-cc9909b881b04d496b70ff44854d99d06e584dfc.tar.gz bcm5719-llvm-cc9909b881b04d496b70ff44854d99d06e584dfc.zip | |
[PowerPC] Swap arguments to vpkuhum/vpkuwum on little-endian
In commit r213915, Bill fixed little-endian usage of vmrgh* and vmrgl*
by swapping the input arguments. As it turns out, the exact same fix
is also required for the vpkuhum/vpkuwum patterns.
This fixes another regression in llvmpipe when vector support is
enabled.
Reviewed by Bill Schmidt.
llvm-svn: 214718
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/vec_shuffle_le.ll | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/PowerPC/vec_shuffle_le.ll b/llvm/test/CodeGen/PowerPC/vec_shuffle_le.ll index 3ab4cc9045b..4fd41a7830d 100644 --- a/llvm/test/CodeGen/PowerPC/vec_shuffle_le.ll +++ b/llvm/test/CodeGen/PowerPC/vec_shuffle_le.ll @@ -6,7 +6,9 @@ entry: %tmp = load <16 x i8>* %A %tmp2 = load <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> -; CHECK: vpkuhum +; CHECK: lvx [[REG1:[0-9]+]] +; CHECK: lvx [[REG2:[0-9]+]] +; CHECK: vpkuhum [[REG3:[0-9]+]], [[REG2]], [[REG1]] store <16 x i8> %tmp3, <16 x i8>* %A ret void } @@ -27,7 +29,9 @@ entry: %tmp = load <16 x i8>* %A %tmp2 = load <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29> -; CHECK: vpkuwum +; CHECK: lvx [[REG1:[0-9]+]] +; CHECK: lvx [[REG2:[0-9]+]] +; CHECK: vpkuwum [[REG3:[0-9]+]], [[REG2]], [[REG1]] store <16 x i8> %tmp3, <16 x i8>* %A ret void } |
