Fix a bit of confusion about .set and produce more readable assembly.

Every target we support has support for assembly that looks like

a = b - c
.long a

What is special about MachO is that the above combination suppresses the
production of a relocation.

With this change we avoid producing the intermediary labels when they don't
add any value.

llvm-svn: 220256

4 files changed, 15 insertions, 27 deletions

diff --git a/llvm/test/CodeGen/AArch64/jump-table.ll b/llvm/test/CodeGen/AArch64/jump-table.ll
index 73b8dc503fc..16682e92c17 100644
--- a/llvm/test/CodeGen/AArch64/jump-table.ll
+++ b/llvm/test/CodeGen/AArch64/jump-table.ll
@@ -56,15 +56,11 @@ lbl4:
 ; CHECK-NEXT: .xword
 
 ; CHECK-PIC-NOT: .data_region
-; CHECK-PIC: .L[[VAR1:.*]] = .LBB{{.*}}-.LJTI0_0
-; CHECK-PIC-NEXT: .L[[VAR2:.*]] = .LBB{{.*}}-.LJTI0_0
-; CHECK-PIC-NEXT: .L[[VAR3:.*]] = .LBB{{.*}}-.LJTI0_0
-; CHECK-PIC-NEXT: .L[[VAR4:.*]] = .LBB{{.*}}-.LJTI0_0
-; CHECK-PIC-NEXT: .L[[VAR5:.*]] = .LBB{{.*}}-.LJTI0_0
-; CHECK-PIC-NEXT: .LJTI0_0:
-; CHECK-PIC-NEXT: .word .L[[VAR1]]
-; CHECK-PIC-NEXT: .word .L[[VAR2]]
-; CHECK-PIC-NEXT: .word .L[[VAR3]]
-; CHECK-PIC-NEXT: .word .L[[VAR4]]
-; CHECK-PIC-NEXT: .word .L[[VAR5]]
+; CHECK-PIC-NOT: .LJTI0_0
+; CHECK-PIC: .LJTI0_0:
+; CHECK-PIC-NEXT: .word .LBB{{.*}}-.LJTI0_0
+; CHECK-PIC-NEXT: .word .LBB{{.*}}-.LJTI0_0
+; CHECK-PIC-NEXT: .word .LBB{{.*}}-.LJTI0_0
+; CHECK-PIC-NEXT: .word .LBB{{.*}}-.LJTI0_0
+; CHECK-PIC-NEXT: .word .LBB{{.*}}-.LJTI0_0
 ; CHECK-PIC-NOT: .end_data_region
diff --git a/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll b/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
index f4c3f9d3b36..1998011f219 100644
--- a/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
+++ b/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
@@ -2,8 +2,7 @@
 ; RUN: llc -mtriple=x86_64-pc-linux -O2 -regalloc=basic < %s | FileCheck %s
 ; Test to check .debug_loc support. This test case emits many debug_loc entries.
 
-; CHECK: Loc expr size
-; CHECK-NEXT: .short
+; CHECK: .short {{.*}} # Loc expr size
 ; CHECK-NEXT: .Ltmp
 ; CHECK-NEXT: DW_OP_reg
 
diff --git a/llvm/test/CodeGen/X86/patchpoint-invoke.ll b/llvm/test/CodeGen/X86/patchpoint-invoke.ll
index d5d4df55ee4..192cacc908a 100644
--- a/llvm/test/CodeGen/X86/patchpoint-invoke.ll
+++ b/llvm/test/CodeGen/X86/patchpoint-invoke.ll
@@ -38,10 +38,8 @@ threw:
 ; CHECK-NEXT: .byte 3
 ; CHECK-NEXT: .byte 13
 ; Verify that the unwind data covers the entire patchpoint region:
-; CHECK-NEXT: [[RANGE_OFFSET:.L[^ ]*]] = .Ltmp0-[[FUNC_BEGIN]]
-; CHECK-NEXT: .long [[RANGE_OFFSET]]
-; CHECK-NEXT: [[RANGE_LENGTH:.L[^ ]*]] = [[PP_END]]-.Ltmp0
-; CHECK-NEXT: .long [[RANGE_LENGTH]]
+; CHECK-NEXT: .long .Ltmp0-[[FUNC_BEGIN]]
+; CHECK-NEXT: .long [[PP_END]]-.Ltmp0
 
 
 ; Verify that the stackmap section got emitted:
diff --git a/llvm/test/CodeGen/XCore/exception.ll b/llvm/test/CodeGen/XCore/exception.ll
index 3179fcdfcf5..fec83eb15ea 100644
--- a/llvm/test/CodeGen/XCore/exception.ll
+++ b/llvm/test/CodeGen/XCore/exception.ll
@@ -107,17 +107,12 @@ Exit:
 ; CHECK: .asciiz
 ; CHECK: .byte  3
 ; CHECK: .byte  26
-; CHECK: [[SET0:.L[a-zA-Z0-9_]+]] = [[PRE_G]]-[[START]]
-; CHECK: .long [[SET0]]
-; CHECK: [[SET1:.L[a-zA-Z0-9_]+]] = [[POST_G]]-[[PRE_G]]
-; CHECK: .long [[SET1]]
-; CHECK: [[SET2:.L[a-zA-Z0-9_]+]] = [[LANDING]]-[[START]]
-; CHECK: .long [[SET2]]
+; CHECK: .long [[PRE_G]]-[[START]]
+; CHECK: .long [[POST_G]]-[[PRE_G]]
+; CHECK: .long [[LANDING]]-[[START]]
 ; CHECK: .byte 3
-; CHECK: [[SET3:.L[a-zA-Z0-9_]+]] = [[POST_G]]-[[START]]
-; CHECK: .long [[SET3]]
-; CHECK: [[SET4:.L[a-zA-Z0-9_]+]] = [[END]]-[[POST_G]]
-; CHECK: .long [[SET4]]
+; CHECK: .long [[POST_G]]-[[START]]
+; CHECK: .long [[END]]-[[POST_G]]
 ; CHECK: .long 0
 ; CHECK: .byte 0
 ; CHECK: .byte 1