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authorDylan McKay <me@dylanmckay.io>2017-10-04 09:51:21 +0000
committerDylan McKay <me@dylanmckay.io>2017-10-04 09:51:21 +0000
commitc4b002bf5a5770f7ecfdc528b49a8768a486ec17 (patch)
tree08917fcfe9d8d606116f7515345864d6ae38dd57 /llvm/test/CodeGen
parent11632a9cfbfa2b9e70d57c221690f35cd5583a80 (diff)
downloadbcm5719-llvm-c4b002bf5a5770f7ecfdc528b49a8768a486ec17.tar.gz
bcm5719-llvm-c4b002bf5a5770f7ecfdc528b49a8768a486ec17.zip
[AVR] Fix displacement overflow for LDDW/STDW
In some cases, the code generator attempts to generate instructions such as: lddw r24, Y+63 which expands to: ldd r24, Y+63 ldd r25, Y+64 # Oops! This is actually ld r25, Y in the binary This commit limits the first offset to 62, and thus the second to 63. It also updates some asserts in AVRExpandPseudoInsts.cpp, including for INW and OUTW, which appear to be unused. Patch by Thomas Backman. llvm-svn: 314890
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll b/llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll
new file mode 100644
index 00000000000..290e349c534
--- /dev/null
+++ b/llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll
@@ -0,0 +1,18 @@
+; RUN: llc -O0 < %s -march=avr | FileCheck %s
+
+define i32 @std_ldd_overflow() {
+ %src = alloca [4 x i8]
+ %dst = alloca [4 x i8]
+ %buf = alloca [28 x i16]
+ %1 = bitcast [4 x i8]* %src to i32*
+ store i32 0, i32 *%1
+ %2 = bitcast [4 x i8]* %dst to i8*
+ %3 = bitcast [4 x i8]* %src to i8*
+ call void @llvm.memcpy.p0i8.p0i8.i16(i8* %2, i8* %3, i16 4, i32 1, i1 false)
+; CHECK-NOT: std {{[XYZ]}}+64, {{r[0-9]+}}
+; CHECK-NOT: ldd {{r[0-9]+}}, {{[XYZ]}}+64
+
+ ret i32 0
+}
+
+declare void @llvm.memcpy.p0i8.p0i8.i16(i8* nocapture writeonly, i8* nocapture readonly, i16, i32, i1)
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