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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-19 00:14:43 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-19 00:14:43 +0000 |
| commit | bf78618db6d9ebac4a1165ab66f4c784e225d5b6 (patch) | |
| tree | 84788f8e3e3d1c73498a4fc73cccef6a38f74b22 /llvm/test/CodeGen | |
| parent | 4079133796951d2978b19947227d62a8bef016e2 (diff) | |
| download | bcm5719-llvm-bf78618db6d9ebac4a1165ab66f4c784e225d5b6.tar.gz bcm5719-llvm-bf78618db6d9ebac4a1165ab66f4c784e225d5b6.zip | |
Make tests register allocation independent again.
llvm-svn: 129739
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/ARM/fcopysign.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/inlineasm3.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/buildpairextractelementf64.ll | 16 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll | 2 |
4 files changed, 10 insertions, 14 deletions
diff --git a/llvm/test/CodeGen/ARM/fcopysign.ll b/llvm/test/CodeGen/ARM/fcopysign.ll index adf989ad915..2b08b03d049 100644 --- a/llvm/test/CodeGen/ARM/fcopysign.ll +++ b/llvm/test/CodeGen/ARM/fcopysign.ll @@ -45,10 +45,10 @@ define i32 @test4() ssp { entry: ; SOFT: test4: ; SOFT: vmov.f64 [[REG4:(d[0-9]+)]], #1.000000e+00 -; SOFT: vcvt.f32.f64 s0, [[REG4]] +; SOFT: vcvt.f32.f64 {{s[0-9]+}}, [[REG4]] ; SOFT: vshr.u64 [[REG4]], [[REG4]], #32 ; SOFT: vmov.i32 [[REG5:(d[0-9]+)]], #0x80000000 -; SOFT: vbsl [[REG5]], [[REG4]], d0 +; SOFT: vbsl [[REG5]], [[REG4]], {{d[0-9]+}} %call80 = tail call double @copysign(double 1.000000e+00, double undef) %conv81 = fptrunc double %call80 to float %tmp88 = bitcast float %conv81 to i32 diff --git a/llvm/test/CodeGen/ARM/inlineasm3.ll b/llvm/test/CodeGen/ARM/inlineasm3.ll index 9f77ad1f794..9d6eba85301 100644 --- a/llvm/test/CodeGen/ARM/inlineasm3.ll +++ b/llvm/test/CodeGen/ARM/inlineasm3.ll @@ -6,7 +6,7 @@ define void @t() nounwind { entry: ; CHECK: vmov.I64 q15, #0 -; CHECK: vmov.32 d30[0], r0 +; CHECK: vmov.32 d30[0], ; CHECK: vmov q8, q15 %tmp = alloca %struct.int32x4_t, align 16 call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(%struct.int32x4_t* %tmp, i32 8192) nounwind diff --git a/llvm/test/CodeGen/Mips/buildpairextractelementf64.ll b/llvm/test/CodeGen/Mips/buildpairextractelementf64.ll index 23eb63c2f27..585bc250fb8 100644 --- a/llvm/test/CodeGen/Mips/buildpairextractelementf64.ll +++ b/llvm/test/CodeGen/Mips/buildpairextractelementf64.ll @@ -1,13 +1,11 @@ -; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-EL -; RUN: llc < %s -march=mips | FileCheck %s -check-prefix=CHECK-EB +; RUN: llc < %s -march=mipsel | FileCheck %s +; RUN: llc < %s -march=mips | FileCheck %s @a = external global i32 define double @f(i32 %a1, double %d) nounwind { entry: -; CHECK-EL: mtc1 $6, $f12 -; CHECK-EL: mtc1 $7, $f13 -; CHECK-EB: mtc1 $7, $f12 -; CHECK-EB: mtc1 $6, $f13 +; CHECK: mtc1 +; CHECK: mtc1 store i32 %a1, i32* @a, align 4 %add = fadd double %d, 2.000000e+00 ret double %add @@ -15,10 +13,8 @@ entry: define void @f3(double %d, i32 %a1) nounwind { entry: -; CHECK-EL: mfc1 ${{[0-9]+}}, $f12 -; CHECK-EL: mfc1 $7, $f13 -; CHECK-EB: mfc1 ${{[0-9]+}}, $f13 -; CHECK-EB: mfc1 $7, $f12 +; CHECK: mfc1 +; CHECK: mfc1 tail call void @f2(i32 %a1, double %d) nounwind ret void } diff --git a/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll b/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll index 06c0dfec5ba..9f5a677ed35 100644 --- a/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll +++ b/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll @@ -10,7 +10,7 @@ define void @_Z19getClosestDiagonal3ii(%0* noalias sret, i32, i32) nounwind { ; CHECK: blx ___muldf3 ; CHECK: blx ___muldf3 -; CHECK: beq LBB0_7 +; CHECK: beq LBB0 ; CHECK: blx ___muldf3 ; <label>:3 switch i32 %1, label %4 [ |
