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authorArnold Schwaighofer <arnold.schwaighofer@gmail.com>2008-04-30 09:16:33 +0000
committerArnold Schwaighofer <arnold.schwaighofer@gmail.com>2008-04-30 09:16:33 +0000
commitbe0de34ede6658914f90eb35d6ee2a5270f8ea8c (patch)
tree541c9bef8ee07515353f73a94bac984bef06ca19 /llvm/test/CodeGen
parentbe5c91d3b3be5a131b30177da766c2fc418ea166 (diff)
downloadbcm5719-llvm-be0de34ede6658914f90eb35d6ee2a5270f8ea8c.tar.gz
bcm5719-llvm-be0de34ede6658914f90eb35d6ee2a5270f8ea8c.zip
Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. llvm-svn: 50477
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/PowerPC/tailcall1-64.ll11
-rw-r--r--llvm/test/CodeGen/PowerPC/tailcall1.ll11
-rw-r--r--llvm/test/CodeGen/PowerPC/tailcallpic1.ll14
3 files changed, 36 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/tailcall1-64.ll b/llvm/test/CodeGen/PowerPC/tailcall1-64.ll
new file mode 100644
index 00000000000..f39b40bdab8
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/tailcall1-64.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=ppc64 -tailcallopt | grep TC_RETURNd8
+define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+entry:
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
+ ret i32 %tmp11
+}
diff --git a/llvm/test/CodeGen/PowerPC/tailcall1.ll b/llvm/test/CodeGen/PowerPC/tailcall1.ll
new file mode 100644
index 00000000000..1fc4b94ddcf
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/tailcall1.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=ppc32 -tailcallopt | grep TC_RETURN
+define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+entry:
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
+ ret i32 %tmp11
+}
diff --git a/llvm/test/CodeGen/PowerPC/tailcallpic1.ll b/llvm/test/CodeGen/PowerPC/tailcallpic1.ll
new file mode 100644
index 00000000000..678d366fb6a
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/tailcallpic1.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -tailcallopt -mtriple=powerpc-apple-darwin -relocation-model=pic | grep TC_RETURN
+
+
+
+define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+entry:
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
+ ret i32 %tmp11
+}
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