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| author | Hao Liu <Hao.Liu@arm.com> | 2014-01-23 02:09:30 +0000 |
|---|---|---|
| committer | Hao Liu <Hao.Liu@arm.com> | 2014-01-23 02:09:30 +0000 |
| commit | b920682e4a1936e769773f2136bccb0b10c93393 (patch) | |
| tree | f1e56a509e3d0dbd865f0c791672091534c9b9e2 /llvm/test/CodeGen | |
| parent | a625495cb88543191f8f1dd8ff482b8133b72c61 (diff) | |
| download | bcm5719-llvm-b920682e4a1936e769773f2136bccb0b10c93393.tar.gz bcm5719-llvm-b920682e4a1936e769773f2136bccb0b10c93393.zip | |
[AArch64]Add CHECK for two test cases testing scalar_to_vector committed in r199461.
llvm-svn: 199861
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/neon-copy.ll | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/AArch64/neon-copy.ll b/llvm/test/CodeGen/AArch64/neon-copy.ll index 514689a2e6b..9960e15513e 100644 --- a/llvm/test/CodeGen/AArch64/neon-copy.ll +++ b/llvm/test/CodeGen/AArch64/neon-copy.ll @@ -967,20 +967,33 @@ entry: ret <2 x i32> %vecinit1.i } -define <2 x float> @test_scalar_to_vector_f32_to_v2f32(<1 x float> %a) { + +define <2 x float> @test_scalar_to_vector_f32_to_v2f32(<2 x float> %a) { +; CHECK-LABEL: test_scalar_to_vector_f32_to_v2f32: +; CHECK: fmaxp s{{[0-9]+}}, v{{[0-9]+}}.2s +; CHECK-NEXT: ret entry: - %0 = extractelement <1 x float> %a, i32 0 - %vecinit1.i = insertelement <2 x float> undef, float %0, i32 0 + %0 = call float @llvm.aarch64.neon.vpmax.f32.v2f32(<2 x float> %a) + %1 = insertelement <1 x float> undef, float %0, i32 0 + %2 = extractelement <1 x float> %1, i32 0 + %vecinit1.i = insertelement <2 x float> undef, float %2, i32 0 ret <2 x float> %vecinit1.i } -define <4 x float> @test_scalar_to_vector_f32_to_v4f32(<1 x float> %a) { +define <4 x float> @test_scalar_to_vector_f32_to_v4f32(<2 x float> %a) { +; CHECK-LABEL: test_scalar_to_vector_f32_to_v4f32: +; CHECK: fmaxp s{{[0-9]+}}, v{{[0-9]+}}.2s +; CHECK-NEXT: ret entry: - %0 = extractelement <1 x float> %a, i32 0 - %vecinit1.i = insertelement <4 x float> undef, float %0, i32 0 + %0 = call float @llvm.aarch64.neon.vpmax.f32.v2f32(<2 x float> %a) + %1 = insertelement <1 x float> undef, float %0, i32 0 + %2 = extractelement <1 x float> %1, i32 0 + %vecinit1.i = insertelement <4 x float> undef, float %2, i32 0 ret <4 x float> %vecinit1.i } +declare float @llvm.aarch64.neon.vpmax.f32.v2f32(<2 x float>) + define <16 x i8> @test_concat_v16i8_v16i8_v16i8(<16 x i8> %x, <16 x i8> %y) #0 { ; CHECK-LABEL: test_concat_v16i8_v16i8_v16i8: ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] |
