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| author | Dan Gohman <dan433584@gmail.com> | 2015-11-10 21:40:21 +0000 |
|---|---|---|
| committer | Dan Gohman <dan433584@gmail.com> | 2015-11-10 21:40:21 +0000 |
| commit | b84ae9bb38dd5d5472d28b2c8f2b686ef1249a85 (patch) | |
| tree | 2c01cc18bb01cb86abb09512108824c3d276c199 /llvm/test/CodeGen | |
| parent | 3809ca9d00eb8596d85b6ca7cdd32195c560cefb (diff) | |
| download | bcm5719-llvm-b84ae9bb38dd5d5472d28b2c8f2b686ef1249a85.tar.gz bcm5719-llvm-b84ae9bb38dd5d5472d28b2c8f2b686ef1249a85.zip | |
[WebAssembly] Support for floating point min and max.
llvm-svn: 252653
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/WebAssembly/f32.ll | 24 | ||||
| -rw-r--r-- | llvm/test/CodeGen/WebAssembly/f64.ll | 24 |
2 files changed, 48 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/f32.ll b/llvm/test/CodeGen/WebAssembly/f32.ll index 1c780819a08..3ae35880d0e 100644 --- a/llvm/test/CodeGen/WebAssembly/f32.ll +++ b/llvm/test/CodeGen/WebAssembly/f32.ll @@ -126,3 +126,27 @@ define float @nearest32_via_rint(float %x) { %a = call float @llvm.rint.f32(float %x) ret float %a } + +; Min and max tests. LLVM currently only forms fminnan and fmaxnan nodes in +; cases where there's a single fcmp with a select and it can prove that one +; of the arms is never NaN, so we only test that case. In the future if LLVM +; learns to form fminnan/fmaxnan in more cases, we can write more general +; tests. + +; CHECK-LABEL: fmin32: +; CHECK: f32.min push, (get_local 1), (get_local 2){{$}} +; CHECK-NEXT: set_local 3, pop{{$}} +define float @fmin32(float %x) { + %a = fcmp ult float %x, 0.0 + %b = select i1 %a, float %x, float 0.0 + ret float %b +} + +; CHECK-LABEL: fmax32: +; CHECK: f32.max push, (get_local 1), (get_local 2){{$}} +; CHECK-NEXT: set_local 3, pop{{$}} +define float @fmax32(float %x) { + %a = fcmp ugt float %x, 0.0 + %b = select i1 %a, float %x, float 0.0 + ret float %b +} diff --git a/llvm/test/CodeGen/WebAssembly/f64.ll b/llvm/test/CodeGen/WebAssembly/f64.ll index 7f0578d811b..d5f6f3e7fe3 100644 --- a/llvm/test/CodeGen/WebAssembly/f64.ll +++ b/llvm/test/CodeGen/WebAssembly/f64.ll @@ -126,3 +126,27 @@ define double @nearest64_via_rint(double %x) { %a = call double @llvm.rint.f64(double %x) ret double %a } + +; Min and max tests. LLVM currently only forms fminnan and fmaxnan nodes in +; cases where there's a single fcmp with a select and it can prove that one +; of the arms is never NaN, so we only test that case. In the future if LLVM +; learns to form fminnan/fmaxnan in more cases, we can write more general +; tests. + +; CHECK-LABEL: fmin64: +; CHECK: f64.min push, (get_local 1), (get_local 2){{$}} +; CHECK-NEXT: set_local 3, pop{{$}} +define double @fmin64(double %x) { + %a = fcmp ult double %x, 0.0 + %b = select i1 %a, double %x, double 0.0 + ret double %b +} + +; CHECK-LABEL: fmax64: +; CHECK: f64.max push, (get_local 1), (get_local 2){{$}} +; CHECK-NEXT: set_local 3, pop{{$}} +define double @fmax64(double %x) { + %a = fcmp ugt double %x, 0.0 + %b = select i1 %a, double %x, double 0.0 + ret double %b +} |

