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authorCraig Topper <craig.topper@gmail.com>2017-01-21 06:59:35 +0000
committerCraig Topper <craig.topper@gmail.com>2017-01-21 06:59:35 +0000
commitb6b909771d6a1b0fa59c53e17b692b5cfe5ad1d3 (patch)
tree737332056e96257ddf0695179bfb011a5e8a937a /llvm/test/CodeGen
parent8902948fff37e1e193a1203a1c67edecdb070d04 (diff)
downloadbcm5719-llvm-b6b909771d6a1b0fa59c53e17b692b5cfe5ad1d3.tar.gz
bcm5719-llvm-b6b909771d6a1b0fa59c53e17b692b5cfe5ad1d3.zip
[X86] Add test cases that show bad commuting being allowed to create a phsub operation.
llvm-svn: 292712
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/X86/phaddsub.ll33
1 files changed, 33 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/phaddsub.ll b/llvm/test/CodeGen/X86/phaddsub.ll
index 44ad05ec6ed..9d09b855add 100644
--- a/llvm/test/CodeGen/X86/phaddsub.ll
+++ b/llvm/test/CodeGen/X86/phaddsub.ll
@@ -225,3 +225,36 @@ define <4 x i32> @phsubd4(<4 x i32> %x) {
%r = sub <4 x i32> %a, %b
ret <4 x i32> %r
}
+
+define <8 x i16> @phsubw1_reverse(<8 x i16> %x, <8 x i16> %y) {
+; SSSE3-LABEL: phsubw1_reverse:
+; SSSE3: # BB#0:
+; SSSE3-NEXT: phsubw %xmm1, %xmm0
+; SSSE3-NEXT: retq
+;
+; AVX-LABEL: phsubw1_reverse:
+; AVX: # BB#0:
+; AVX-NEXT: vphsubw %xmm1, %xmm0, %xmm0
+; AVX-NEXT: retq
+ %a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+ %b = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+ %r = sub <8 x i16> %a, %b
+ ret <8 x i16> %r
+}
+
+define <4 x i32> @phsubd1_reverse(<4 x i32> %x, <4 x i32> %y) {
+; SSSE3-LABEL: phsubd1_reverse:
+; SSSE3: # BB#0:
+; SSSE3-NEXT: phsubd %xmm1, %xmm0
+; SSSE3-NEXT: retq
+;
+; AVX-LABEL: phsubd1_reverse:
+; AVX: # BB#0:
+; AVX-NEXT: vphsubd %xmm1, %xmm0, %xmm0
+; AVX-NEXT: retq
+ %a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+ %b = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+ %r = sub <4 x i32> %a, %b
+ ret <4 x i32> %r
+}
+
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