For PR411:

Update these tests to not use the same name even though the type of the
value differs. After PR411 hits, type planes will be gone and it will be
illegal for a name to be used twice, regardless of type.

llvm-svn: 33660

10 files changed, 45 insertions, 42 deletions

diff --git a/llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll b/llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
index 0dbf79562d9..c69798b0b31 100644
--- a/llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
+++ b/llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
@@ -34,8 +34,8 @@ cond_next589:		; preds = %cond_next489
 	%tmp606 = load i32* %tmp605		; <i32> [#uses=1]
 	%tmp612 = load i32* null		; <i32> [#uses=1]
 	%tmp629 = load i32* null		; <i32> [#uses=1]
-	%tmp629 = sitofp i32 %tmp629 to double		; <double> [#uses=1]
-	%tmp631 = mul double %tmp629, 0.000000e+00		; <double> [#uses=1]
+	%tmp629a = sitofp i32 %tmp629 to double		; <double> [#uses=1]
+	%tmp631 = mul double %tmp629a, 0.000000e+00		; <double> [#uses=1]
 	%tmp632 = add double 0.000000e+00, %tmp631		; <double> [#uses=1]
 	%tmp642 = call fastcc i32 @sign( i32 %tmp576, i32 %tmp561 )		; <i32> [#uses=1]
 	%tmp650 = mul i32 %tmp606, %tmp642		; <i32> [#uses=1]
@@ -44,9 +44,9 @@ cond_next589:		; preds = %cond_next489
 	%tmp659 = ashr i32 %tmp658, i8 6		; <i32> [#uses=1]
 	%tmp660 = sub i32 0, %tmp659		; <i32> [#uses=1]
 	%tmp666 = sub i32 %tmp660, %tmp496		; <i32> [#uses=1]
-	%tmp666 = sitofp i32 %tmp666 to double		; <double> [#uses=2]
+	%tmp667 = sitofp i32 %tmp666 to double		; <double> [#uses=2]
 	call void @levrun_linfo_inter( i32 %tmp576, i32 0, i32* null, i32* null )
-	%tmp671 = mul double %tmp666, %tmp666		; <double> [#uses=1]
+	%tmp671 = mul double %tmp667, %tmp667		; <double> [#uses=1]
 	%tmp675 = add double %tmp671, 0.000000e+00		; <double> [#uses=1]
 	%tmp678 = fcmp oeq double %tmp632, %tmp675		; <i1> [#uses=1]
 	br i1 %tmp678, label %cond_true679, label %cond_false693
diff --git a/llvm/test/CodeGen/ARM/fcopysign.ll b/llvm/test/CodeGen/ARM/fcopysign.ll
index 73c6670bfc4..b384f36a5c1 100644
--- a/llvm/test/CodeGen/ARM/fcopysign.ll
+++ b/llvm/test/CodeGen/ARM/fcopysign.ll
@@ -6,8 +6,8 @@
 define float @test1(float %x, double %y) {
 	%tmp = fpext float %x to double
 	%tmp2 = tail call double @copysign( double %tmp, double %y )
-	%tmp2 = fptrunc double %tmp2 to float
-	ret float %tmp2
+	%tmp3 = fptrunc double %tmp2 to float
+	ret float %tmp3
 }
 
 define double @test2(double %x, float %y) {
diff --git a/llvm/test/CodeGen/ARM/fp.ll b/llvm/test/CodeGen/ARM/fp.ll
index 15be71637b2..f85c17a46ac 100644
--- a/llvm/test/CodeGen/ARM/fp.ll
+++ b/llvm/test/CodeGen/ARM/fp.ll
@@ -43,7 +43,7 @@ entry:
 	ret double %tmp
 }
 
-float %h() {
+float %h2() {
 entry:
         ret float 1.000000e+00
 }
diff --git a/llvm/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll b/llvm/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll
index cfbac7d3bc5..d9374edfe86 100644
--- a/llvm/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll
+++ b/llvm/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll
@@ -1,9 +1,10 @@
-; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep cntlzw
+; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
+; RUN:    grep cntlzw
 
 define i32 @foo() {
 entry:
 	%retval = alloca i32, align 4		; <i32*> [#uses=2]
-	%tmp = alloca i32, align 4		; <i32*> [#uses=2]
+	%temp = alloca i32, align 4		; <i32*> [#uses=2]
 	%ctz_x = alloca i32, align 4		; <i32*> [#uses=3]
 	%ctz_c = alloca i32, align 4		; <i32*> [#uses=2]
 	"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
@@ -15,12 +16,12 @@ entry:
 	%tmp4 = call i32 asm "$(cntlz$|cntlzw$) $0,$1", "=r,r,~{dirflag},~{fpsr},~{flags}"( i32 %tmp3 )		; <i32> [#uses=1]
 	store i32 %tmp4, i32* %ctz_c
 	%tmp5 = load i32* %ctz_c		; <i32> [#uses=1]
-	store i32 %tmp5, i32* %tmp
-	%tmp6 = load i32* %tmp		; <i32> [#uses=1]
+	store i32 %tmp5, i32* %temp
+	%tmp6 = load i32* %temp		; <i32> [#uses=1]
 	store i32 %tmp6, i32* %retval
 	br label %return
 
 return:		; preds = %entry
-	%retval = load i32* %retval		; <i32> [#uses=1]
-	ret i32 %retval
+	%retval2 = load i32* %retval		; <i32> [#uses=1]
+	ret i32 %retval2
 }
diff --git a/llvm/test/CodeGen/PowerPC/and_sext.ll b/llvm/test/CodeGen/PowerPC/and_sext.ll
index 7f4c5f0c066..4c3fd14cbd1 100644
--- a/llvm/test/CodeGen/PowerPC/and_sext.ll
+++ b/llvm/test/CodeGen/PowerPC/and_sext.ll
@@ -15,15 +15,15 @@ define i16 @test2(i16 sext %X, i16 sext %x) sext {
         %tmp1 = sext i16 %x to i32
         %tmp2 = add i32 %tmp, %tmp1
         %tmp4 = ashr i32 %tmp2, i8 1
-        %tmp4 = trunc i32 %tmp4 to i16
-        %tmp45 = sext i16 %tmp4 to i32
+        %tmp5 = trunc i32 %tmp4 to i16
+        %tmp45 = sext i16 %tmp5 to i32
         %retval = trunc i32 %tmp45 to i16
         ret i16 %retval
 }
 
 define i16 @test3(i32 zext %X) sext {
         %tmp1 = lshr i32 %X, i8 16
-        %tmp1 = trunc i32 %tmp1 to i16
-        ret i16 %tmp1
+        %tmp2 = trunc i32 %tmp1 to i16
+        ret i16 %tmp2
 }
 
diff --git a/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll b/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
index 9e218b53b2c..54c249c8bef 100644
--- a/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
+++ b/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
@@ -15,11 +15,11 @@ b:
 	%r6 = load i32* %a3
 	%r8 = load i32* %a4
 	%r14 = load i32* %a5
-	%r = sext i32 %r2 to i64
+	%rx = sext i32 %r2 to i64
 	%r9 = sext i32 %r to i64
-	%r11 = add i64 %r, 0
-	%r = icmp slt i64 %r11, 0
-	%r12 = select i1 %r, i64 0, i64 %r11
+	%r11 = add i64 %rx, 0
+	%ras = icmp slt i64 %r11, 0
+	%r12 = select i1 %ras, i64 0, i64 %r11
 	%r16 = sext i32 %r14 to i64
 	%r17 = sext i32 %r8 to i64
 	%r18 = sub i64 %r16, 0
@@ -28,17 +28,17 @@ b:
 	%r19h = add i64 %r18, 0
 	%r22 = select i1 %r20, i64 1, i64 %r19h
 	%r23 = mul i64 %r22, 0
-	%r23 = trunc i64 %r23 to i32
-	%r24 = shl i32 %r23, i8 0
+	%r23a = trunc i64 %r23 to i32
+	%r24 = shl i32 %r23a, i8 0
 	%r25 = add i32 %r24, 0
-	%r = alloca i8, i32 %r25, align 16
-	%r28 = getelementptr i8* %r, i32 0
+	%ras2 = alloca i8, i32 %r25, align 16
+	%r28 = getelementptr i8* %ras2, i32 0
 	%r38 = shl i64 %r12, i8 0
 	%s2013 = add i64 %r38, 0
-	%c22012 = getelementptr i8* %r, i64 %s2013
+	%c22012 = getelementptr i8* %ras2, i64 %s2013
 	%r42 = shl i64 %r12, i8 0
 	%s2011 = add i64 %r42, 16
-	%c22010 = getelementptr i8* %r, i64 %s2011
+	%c22010 = getelementptr i8* %ras2, i64 %s2011
 	%r50 = add i64 %r16, 0
 	%r51 = icmp slt i64 %r50, 0
 	%r50sh = shl i64 %r50, i8 0
@@ -46,7 +46,7 @@ b:
 	%r54 = select i1 %r51, i64 0, i64 %r50j
 	%r56 = mul i64 %r54, %r12
 	%r28s = add i64 %r56, 16
-	%c2 = getelementptr i8* %r, i64 %r28s
+	%c2 = getelementptr i8* %ras2, i64 %r28s
 	%r60 = sub i32 %r2, %r
 	%r61 = icmp slt i32 %r60, 0
 	br i1 %r61, label %a29b, label %b63
@@ -112,9 +112,9 @@ a30b294q:
 	br label %a30b294
 a30b:
 	%w = phi i64 [ 0, %b179 ], [ %v, %a30b ]
-	%b = shl i64 %w, i8 0
-	%r283 = add i64 %b, 0
-	%r286 = add i64 %b, 0
+	%b2 = shl i64 %w, i8 0
+	%r283 = add i64 %b2, 0
+	%r286 = add i64 %b2, 0
 	%r288 = icmp slt i64 %r286, 0
 	%v = add i64 %w, 0
 	br i1 %r288, label %b188, label %a30b
@@ -204,7 +204,7 @@ a45b:
 	%v1853 = add i64 %w1852, 0
 	br i1 %r708, label %b565, label %a45b
 b712:
-	%r795 = add i64 %r, 0
+	%r795 = add i64 %rx, 0
 	%r799 = add i64 %s923, 0
 	%r802 = add i64 %w1855, 0
 	%r807 = icmp slt i64 %r802, 0
@@ -255,7 +255,7 @@ b820:
 	%r846 = sext i32 %r60 to i64
 	%r847 = add i64 %r846, 0
 	%r851 = load float* bitcast ([128 x i64]* @i6000 to float*)
-	%r856 = sub i64 %r, 0
+	%r856 = sub i64 %rx, 0
 	br label %b858
 b858:
 	%w1891 = phi i64 [ 0, %b820 ], [ %v1892, %b1016 ]
@@ -321,7 +321,7 @@ a66b:
 	br i1 %r817, label %a93b, label %b1321
 b1086:
 	%r1089 = sext i32 %r2 to i64
-	%r1090 = add i64 %r, 0
+	%r1090 = add i64 %rx, 0
 	%r1096 = mul i64 %r9, 0
 	%r1101 = sext i32 %r8 to i64
 	%r1104 = add i64 %r1096, 0
@@ -424,7 +424,7 @@ a74b:
 	%v1959 = add i64 %w1958, 0
 	br i1 %r1581, label %a74b, label %b1582
 b1582:
-	%r1587 = add i64 %r, 0
+	%r1587 = add i64 %rx, 0
 	%r1591 = add i64 %s1563, 0
 	%r1596 = add i64 %d1533, 0
 	%r1601 = icmp slt i64 %r1596, 0
diff --git a/llvm/test/CodeGen/X86/select.ll b/llvm/test/CodeGen/X86/select.ll
index 71f4742c08b..96b2e3ebae1 100644
--- a/llvm/test/CodeGen/X86/select.ll
+++ b/llvm/test/CodeGen/X86/select.ll
@@ -43,7 +43,7 @@ int %foldSel2(bool %A, int %B, int %C) {
 	ret int %X
 }
 
-int %foldSel2(bool %A, int %B, int %C, double %X, double %Y) {
+int %foldSel2a(bool %A, int %B, int %C, double %X, double %Y) {
 	%Cond = setlt double %X, %Y
 	%X = select bool %Cond, int %B, int %C
 	ret int %X
diff --git a/llvm/test/CodeGen/X86/trunc-to-bool.ll b/llvm/test/CodeGen/X86/trunc-to-bool.ll
index f2871f7d713..8486bbd4286 100644
--- a/llvm/test/CodeGen/X86/trunc-to-bool.ll
+++ b/llvm/test/CodeGen/X86/trunc-to-bool.ll
@@ -12,8 +12,8 @@ define i1 @test1(i32 %X) zext {
 
 define i1 @test2(i32 %val, i32 %mask) {
 entry:
-    %mask = trunc i32 %mask to i8
-    %shifted = ashr i32 %val, i8 %mask
+    %maski8 = trunc i32 %mask to i8
+    %shifted = ashr i32 %val, i8 %maski8
     %anded = and i32 %shifted, 1
     %trunced = trunc i32 %anded to i1
     br i1 %trunced, label %ret_true, label %ret_false
diff --git a/llvm/test/CodeGen/X86/vec_set-3.ll b/llvm/test/CodeGen/X86/vec_set-3.ll
index 5cb133c134b..23c5808af12 100644
--- a/llvm/test/CodeGen/X86/vec_set-3.ll
+++ b/llvm/test/CodeGen/X86/vec_set-3.ll
@@ -1,5 +1,7 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep shufps | wc -l | grep 1 &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep pshufd | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \
+; RUN:    grep shufps | wc -l | grep 1 &&
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \
+; RUN:    grep pshufd | wc -l | grep 1
 
 <4 x float> %test(float %a) {
 	%tmp = insertelement <4 x float> zeroinitializer, float %a, uint 1
@@ -8,7 +10,7 @@
 	ret <4 x float> %tmp6
 }
 
-<2 x long> %test(int %a) {
+<2 x long> %test2(int %a) {
 	%tmp7 = insertelement <4 x int> zeroinitializer, int %a, uint 2
 	%tmp9 = insertelement <4 x int> %tmp7, int 0, uint 3
 	%tmp10 = cast <4 x int> %tmp9 to <2 x long>
diff --git a/llvm/test/CodeGen/X86/vec_set-4.ll b/llvm/test/CodeGen/X86/vec_set-4.ll
index 745200fab92..c656a5817a7 100644
--- a/llvm/test/CodeGen/X86/vec_set-4.ll
+++ b/llvm/test/CodeGen/X86/vec_set-4.ll
@@ -11,7 +11,7 @@ entry:
 	ret <2 x long> %tmp19
 }
 
-<2 x long> %test(sbyte %a) {
+<2 x long> %test2(sbyte %a) {
 entry:
 	%tmp24 = insertelement <16 x sbyte> zeroinitializer, sbyte %a, uint 10
 	%tmp26 = insertelement <16 x sbyte> %tmp24, sbyte 0, uint 11