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| author | Jacques Pienaar <jpienaar@google.com> | 2016-04-14 17:59:22 +0000 |
|---|---|---|
| committer | Jacques Pienaar <jpienaar@google.com> | 2016-04-14 17:59:22 +0000 |
| commit | ad1db3597ee04552afb069252ee73f8091854145 (patch) | |
| tree | 0974fd92174c2bb96d0608286c0a2774b2bf5f76 /llvm/test/CodeGen | |
| parent | cef0fe4245c52d389786455f246475b19c491ac6 (diff) | |
| download | bcm5719-llvm-ad1db3597ee04552afb069252ee73f8091854145.tar.gz bcm5719-llvm-ad1db3597ee04552afb069252ee73f8091854145.zip | |
[lanai] Add custom lowering for SRL_PARTS i32.
llvm-svn: 266349
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/Lanai/rshift64.ll | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Lanai/rshift64.ll b/llvm/test/CodeGen/Lanai/rshift64.ll new file mode 100644 index 00000000000..2009edd001c --- /dev/null +++ b/llvm/test/CodeGen/Lanai/rshift64.ll @@ -0,0 +1,12 @@ +; RUN: llc < %s -mtriple=lanai-unknown-unknown | FileCheck %s + +; Test right-shift i64 lowering does not result in call being inserted. + +; CHECK-LABEL: shift +; CHECK-NOT: bt __lshrdi3 +; CHECK: %rv +define i64 @shift(i64 inreg, i32 inreg) { + %3 = zext i32 %1 to i64 + %4 = lshr i64 %0, %3 + ret i64 %4 +} |
