Remove the obsolete offset parameter from @llvm.dbg.value

There is no situation where this rarely-used argument cannot be
substituted with a DIExpression and removing it allows us to simplify
the DWARF backend. Note that this patch does not yet remove any of
the newly dead code.

rdar://problem/33580047
Differential Revision: https://reviews.llvm.org/D35951

llvm-svn: 309426

14 files changed, 82 insertions, 82 deletions

diff --git a/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll b/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
index 089cff82bc5..46f52d8a774 100644
--- a/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
+++ b/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
@@ -5,12 +5,12 @@ target triple = "armv4t-apple-darwin10"
 
 define hidden i32 @__addvsi3(i32 %a, i32 %b) nounwind {
 entry:
-  tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1)
+  tail call void @llvm.dbg.value(metadata i32 %b, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1)
   %0 = add nsw i32 %b, %a, !dbg !9                ; <i32> [#uses=1]
   ret i32 %0, !dbg !11
 }
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 !llvm.dbg.cu = !{!3}
 !llvm.module.flags = !{!15}
diff --git a/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll b/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll
index 7a98af161c1..18a6472c61d 100644
--- a/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll
+++ b/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll
@@ -9,16 +9,16 @@ target triple = "thumbv7-apple-darwin3.0.0-iphoneos"
 ; Function Attrs: nounwind optsize
 define void @x0(i8* nocapture %buf, i32 %nbytes) #0 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8* %buf, i64 0, metadata !8, metadata !14), !dbg !15
-  tail call void @llvm.dbg.value(metadata i32 %nbytes, i64 0, metadata !16, metadata !14), !dbg !18
+  tail call void @llvm.dbg.value(metadata i8* %buf, metadata !8, metadata !14), !dbg !15
+  tail call void @llvm.dbg.value(metadata i32 %nbytes, metadata !16, metadata !14), !dbg !18
   %tmp = load i32, i32* @length, !dbg !19
   %cmp = icmp eq i32 %tmp, -1, !dbg !19
   %cmp.not = xor i1 %cmp, true
   %cmp3 = icmp ult i32 %tmp, %nbytes, !dbg !19
   %or.cond = and i1 %cmp.not, %cmp3
-  tail call void @llvm.dbg.value(metadata i32 %tmp, i64 0, metadata !16, metadata !14), !dbg !19
+  tail call void @llvm.dbg.value(metadata i32 %tmp, metadata !16, metadata !14), !dbg !19
   %nbytes.addr.0 = select i1 %or.cond, i32 %tmp, i32 %nbytes
-  tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !21, metadata !14), !dbg !22
+  tail call void @llvm.dbg.value(metadata i32 0, metadata !21, metadata !14), !dbg !22
   br label %while.cond, !dbg !23
 
 while.cond:                                       ; preds = %while.body, %entry
@@ -47,7 +47,7 @@ while.end:                                        ; preds = %land.rhs, %while.co
 declare i32 @x1() #1
 
 ; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, metadata, metadata) #2
 
 attributes #0 = { nounwind optsize }
 attributes #1 = { optsize }
diff --git a/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll b/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
index 1bfb892d52f..3b4fb14c7d4 100644
--- a/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
+++ b/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
@@ -9,8 +9,8 @@ target triple = "arm-apple-darwin"
 define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp !dbg !17 {
 entry:
   %"alloca point" = bitcast i32 0 to i32
-  call void @llvm.dbg.value(metadata i32 %i, i64 0, metadata !23, metadata !DIExpression()), !dbg !24
-  call void @llvm.dbg.value(metadata %struct.SVal* %location, i64 0, metadata !25, metadata !DIExpression()), !dbg !24
+  call void @llvm.dbg.value(metadata i32 %i, metadata !23, metadata !DIExpression()), !dbg !24
+  call void @llvm.dbg.value(metadata %struct.SVal* %location, metadata !25, metadata !DIExpression()), !dbg !24
   %0 = icmp ne i32 %i, 0, !dbg !27
   br i1 %0, label %bb, label %bb1, !dbg !27
 
@@ -37,7 +37,7 @@ return:
 define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2  !dbg !16 {
 entry:
   %"alloca point" = bitcast i32 0 to i32
-  call void @llvm.dbg.value(metadata %struct.SVal* %this, i64 0, metadata !31, metadata !DIExpression()), !dbg !34
+  call void @llvm.dbg.value(metadata %struct.SVal* %this, metadata !31, metadata !DIExpression()), !dbg !34
   %0 = getelementptr inbounds %struct.SVal, %struct.SVal* %this, i32 0, i32 0, !dbg !34
   store i8* null, i8** %0, align 8, !dbg !34
   %1 = getelementptr inbounds %struct.SVal, %struct.SVal* %this, i32 0, i32 1, !dbg !34
@@ -68,14 +68,14 @@ entry:
   %7 = load i32, i32* %6, align 8, !dbg !43
   store i32 %7, i32* %5, align 8, !dbg !43
   %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43
-  call void @llvm.dbg.value(metadata i32 %8, i64 0, metadata !44, metadata !DIExpression()), !dbg !43
+  call void @llvm.dbg.value(metadata i32 %8, metadata !44, metadata !DIExpression()), !dbg !43
   br label %return, !dbg !45
 
 return:
   ret i32 0, !dbg !45
 }
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 !llvm.dbg.cu = !{!3}
 !llvm.module.flags = !{!49}
diff --git a/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll b/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
index d303f3a30d1..2cd12c8e2fe 100644
--- a/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
+++ b/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
@@ -31,22 +31,22 @@ target triple = "thumbv7-apple-darwin10"
 ; Function Attrs: nounwind optsize
 define zeroext i8 @get1(i8 zeroext %a) #0 !dbg !16 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !20, metadata !23), !dbg !24
+  tail call void @llvm.dbg.value(metadata i8 %a, metadata !20, metadata !23), !dbg !24
   %0 = load i8, i8* @x1, align 4, !dbg !24
-  tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !21, metadata !23), !dbg !24
+  tail call void @llvm.dbg.value(metadata i8 %0, metadata !21, metadata !23), !dbg !24
   store i8 %a, i8* @x1, align 4, !dbg !24
   ret i8 %0, !dbg !25
 }
 
 ; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, metadata, metadata) #1
 
 ; Function Attrs: nounwind optsize
 define zeroext i8 @get2(i8 zeroext %a) #0 !dbg !26 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !28, metadata !23), !dbg !31
+  tail call void @llvm.dbg.value(metadata i8 %a, metadata !28, metadata !23), !dbg !31
   %0 = load i8, i8* @x2, align 4, !dbg !31
-  tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !29, metadata !23), !dbg !31
+  tail call void @llvm.dbg.value(metadata i8 %0, metadata !29, metadata !23), !dbg !31
   store i8 %a, i8* @x2, align 4, !dbg !31
   ret i8 %0, !dbg !32
 }
@@ -55,9 +55,9 @@ entry:
 
 define zeroext i8 @get3(i8 zeroext %a) #0 !dbg !33 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !35, metadata !23), !dbg !38
+  tail call void @llvm.dbg.value(metadata i8 %a, metadata !35, metadata !23), !dbg !38
   %0 = load i8, i8* @x3, align 4, !dbg !38
-  tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !36, metadata !23), !dbg !38
+  tail call void @llvm.dbg.value(metadata i8 %0, metadata !36, metadata !23), !dbg !38
   store i8 %a, i8* @x3, align 4, !dbg !38
   ret i8 %0, !dbg !39
 }
@@ -66,9 +66,9 @@ entry:
 
 define zeroext i8 @get4(i8 zeroext %a) #0 !dbg !40 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !42, metadata !23), !dbg !45
+  tail call void @llvm.dbg.value(metadata i8 %a, metadata !42, metadata !23), !dbg !45
   %0 = load i8, i8* @x4, align 4, !dbg !45
-  tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !43, metadata !23), !dbg !45
+  tail call void @llvm.dbg.value(metadata i8 %0, metadata !43, metadata !23), !dbg !45
   store i8 %a, i8* @x4, align 4, !dbg !45
   ret i8 %0, !dbg !46
 }
@@ -77,9 +77,9 @@ entry:
 
 define zeroext i8 @get5(i8 zeroext %a) #0 !dbg !47 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !49, metadata !23), !dbg !52
+  tail call void @llvm.dbg.value(metadata i8 %a, metadata !49, metadata !23), !dbg !52
   %0 = load i8, i8* @x5, align 4, !dbg !52
-  tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !50, metadata !23), !dbg !52
+  tail call void @llvm.dbg.value(metadata i8 %0, metadata !50, metadata !23), !dbg !52
   store i8 %a, i8* @x5, align 4, !dbg !52
   ret i8 %0, !dbg !53
 }
diff --git a/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll b/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll
index 69e5a0d77a1..379bc16555b 100644
--- a/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll
+++ b/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll
@@ -31,9 +31,9 @@ target triple = "thumbv7-apple-macosx10.7.0"
 
 ; Function Attrs: nounwind optsize ssp
 define i32 @get1(i32 %a) #0 !dbg !10 {
-  tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !14, metadata !17), !dbg !18
+  tail call void @llvm.dbg.value(metadata i32 %a, metadata !14, metadata !17), !dbg !18
   %1 = load i32, i32* @x1, align 4, !dbg !19
-  tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !15, metadata !17), !dbg !19
+  tail call void @llvm.dbg.value(metadata i32 %1, metadata !15, metadata !17), !dbg !19
   store i32 %a, i32* @x1, align 4, !dbg !19
   ret i32 %1, !dbg !19
 }
@@ -41,9 +41,9 @@ define i32 @get1(i32 %a) #0 !dbg !10 {
 ; Function Attrs: nounwind optsize ssp
 
 define i32 @get2(i32 %a) #0 !dbg !20 {
-  tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !22, metadata !17), !dbg !25
+  tail call void @llvm.dbg.value(metadata i32 %a, metadata !22, metadata !17), !dbg !25
   %1 = load i32, i32* @x2, align 4, !dbg !26
-  tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !23, metadata !17), !dbg !26
+  tail call void @llvm.dbg.value(metadata i32 %1, metadata !23, metadata !17), !dbg !26
   store i32 %a, i32* @x2, align 4, !dbg !26
   ret i32 %1, !dbg !26
 }
@@ -51,9 +51,9 @@ define i32 @get2(i32 %a) #0 !dbg !20 {
 ; Function Attrs: nounwind optsize ssp
 
 define i32 @get3(i32 %a) #0 !dbg !27 {
-  tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !29, metadata !17), !dbg !32
+  tail call void @llvm.dbg.value(metadata i32 %a, metadata !29, metadata !17), !dbg !32
   %1 = load i32, i32* @x3, align 4, !dbg !33
-  tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !30, metadata !17), !dbg !33
+  tail call void @llvm.dbg.value(metadata i32 %1, metadata !30, metadata !17), !dbg !33
   store i32 %a, i32* @x3, align 4, !dbg !33
   ret i32 %1, !dbg !33
 }
@@ -61,9 +61,9 @@ define i32 @get3(i32 %a) #0 !dbg !27 {
 ; Function Attrs: nounwind optsize ssp
 
 define i32 @get4(i32 %a) #0 !dbg !34 {
-  tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !36, metadata !17), !dbg !39
+  tail call void @llvm.dbg.value(metadata i32 %a, metadata !36, metadata !17), !dbg !39
   %1 = load i32, i32* @x4, align 4, !dbg !40
-  tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !37, metadata !17), !dbg !40
+  tail call void @llvm.dbg.value(metadata i32 %1, metadata !37, metadata !17), !dbg !40
   store i32 %a, i32* @x4, align 4, !dbg !40
   ret i32 %1, !dbg !40
 }
@@ -71,16 +71,16 @@ define i32 @get4(i32 %a) #0 !dbg !34 {
 ; Function Attrs: nounwind optsize ssp
 
 define i32 @get5(i32 %a) #0 !dbg !41 {
-  tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !43, metadata !17), !dbg !46
+  tail call void @llvm.dbg.value(metadata i32 %a, metadata !43, metadata !17), !dbg !46
   %1 = load i32, i32* @x5, align 4, !dbg !47
-  tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !44, metadata !17), !dbg !47
+  tail call void @llvm.dbg.value(metadata i32 %1, metadata !44, metadata !17), !dbg !47
   store i32 %a, i32* @x5, align 4, !dbg !47
   ret i32 %1, !dbg !47
 }
 
 ; Function Attrs: nounwind readnone
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, metadata, metadata) #1
 
 attributes #0 = { nounwind optsize ssp }
 attributes #1 = { nounwind readnone }
diff --git a/llvm/test/CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll b/llvm/test/CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
index 76b594681d7..3ed70709338 100644
--- a/llvm/test/CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
+++ b/llvm/test/CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
@@ -7,7 +7,7 @@
 ; Function Attrs: minsize nounwind optsize readonly
 define %struct.s* @s_idx(%struct.s* readonly %xl) local_unnamed_addr #0 !dbg !8 {
 entry:
-  tail call void @llvm.dbg.value(metadata %struct.s* %xl, i64 0, metadata !17, metadata !18), !dbg !19
+  tail call void @llvm.dbg.value(metadata %struct.s* %xl, metadata !17, metadata !18), !dbg !19
   br label %while.cond, !dbg !20
 
 while.cond:                                       ; preds = %while.body, %entry
@@ -18,7 +18,7 @@ while.cond:                                       ; preds = %while.body, %entry
 while.body:                                       ; preds = %while.cond
   %next = getelementptr inbounds %struct.s, %struct.s* %xl.addr.0, i32 0, i32 0
   %0 = load %struct.s*, %struct.s** %next, align 4
-  tail call void @llvm.dbg.value(metadata %struct.s* %0, i64 0, metadata !17, metadata !18), !dbg !19
+  tail call void @llvm.dbg.value(metadata %struct.s* %0, metadata !17, metadata !18), !dbg !19
   br label %while.cond
 
 while.end:                                        ; preds = %while.cond
@@ -26,7 +26,7 @@ while.end:                                        ; preds = %while.cond
 }
 
 ; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, metadata, metadata) #1
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!3, !4, !5, !6}
diff --git a/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll b/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll
index c346ea102c3..389b1a93e43 100644
--- a/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll
+++ b/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll
@@ -28,11 +28,11 @@ for.cond1:                                        ; preds = %for.end9, %for.cond
 
 for.body2:                                        ; preds = %for.cond1
   store i32 %storemerge11, i32* @b, align 4, !dbg !26
-  tail call void @llvm.dbg.value(metadata i32* null, i64 0, metadata !20, metadata !27), !dbg !28
+  tail call void @llvm.dbg.value(metadata i32* null, metadata !20, metadata !27), !dbg !28
   %0 = load i64, i64* @a, align 8, !dbg !29
   %xor = xor i64 %0, %e.1.ph, !dbg !29
   %conv3 = trunc i64 %xor to i32, !dbg !29
-  tail call void @llvm.dbg.value(metadata i32 %conv3, i64 0, metadata !19, metadata !27), !dbg !29
+  tail call void @llvm.dbg.value(metadata i32 %conv3, metadata !19, metadata !27), !dbg !29
   %tobool4 = icmp eq i32 %conv3, 0, !dbg !29
   br i1 %tobool4, label %land.end, label %land.rhs, !dbg !29
 
@@ -70,7 +70,7 @@ declare i32 @fn2(...) #1
 declare i32 @fn3(...) #1
 
 ; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, metadata, metadata) #2
 
 attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/CodeGen/ARM/debug-info-arg.ll b/llvm/test/CodeGen/ARM/debug-info-arg.ll
index d80788dad73..5cf78f57dbc 100644
--- a/llvm/test/CodeGen/ARM/debug-info-arg.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-arg.ll
@@ -7,13 +7,13 @@ target triple = "thumbv7-apple-ios"
 %struct.tag_s = type { i32, i32, i32 }
 
 define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp "no-frame-pointer-elim"="true" !dbg !1 {
-  tail call void @llvm.dbg.value(metadata %struct.tag_s* %this, i64 0, metadata !5, metadata !DIExpression()), !dbg !20
-  tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, i64 0, metadata !13, metadata !DIExpression()), !dbg !21
-  tail call void @llvm.dbg.value(metadata i64 %x, i64 0, metadata !14, metadata !DIExpression()), !dbg !22
-  tail call void @llvm.dbg.value(metadata i64 %y, i64 0, metadata !17, metadata !DIExpression()), !dbg !23
+  tail call void @llvm.dbg.value(metadata %struct.tag_s* %this, metadata !5, metadata !DIExpression()), !dbg !20
+  tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, metadata !13, metadata !DIExpression()), !dbg !21
+  tail call void @llvm.dbg.value(metadata i64 %x, metadata !14, metadata !DIExpression()), !dbg !22
+  tail call void @llvm.dbg.value(metadata i64 %y, metadata !17, metadata !DIExpression()), !dbg !23
 ;CHECK:	@DEBUG_VALUE: foo:y <- [%R7+8]
-  tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr1, i64 0, metadata !18, metadata !DIExpression()), !dbg !24
-  tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr2, i64 0, metadata !19, metadata !DIExpression()), !dbg !25
+  tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr1, metadata !18, metadata !DIExpression()), !dbg !24
+  tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr2, metadata !19, metadata !DIExpression()), !dbg !25
   %1 = icmp eq %struct.tag_s* %c, null, !dbg !26
   br i1 %1, label %3, label %2, !dbg !26
 
@@ -27,7 +27,7 @@ define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64
 
 declare void @foobar(i64, i64)
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!33}
diff --git a/llvm/test/CodeGen/ARM/debug-info-blocks.ll b/llvm/test/CodeGen/ARM/debug-info-blocks.ll
index 6019a9410b0..5aa5fcda93c 100644
--- a/llvm/test/CodeGen/ARM/debug-info-blocks.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-blocks.ll
@@ -39,7 +39,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
 
 declare i8* @objc_msgSend(i8*, i8*, ...)
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
 
@@ -47,7 +47,7 @@ define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %load
   %1 = alloca %0*, align 4
   %bounds = alloca %struct.CR, align 4
   %data = alloca %struct.CR, align 4
-  call void @llvm.dbg.value(metadata i8* %.block_descriptor, i64 0, metadata !27, metadata !DIExpression()), !dbg !129
+  call void @llvm.dbg.value(metadata i8* %.block_descriptor, metadata !27, metadata !DIExpression()), !dbg !129
   store %0* %loadedMydata, %0** %1, align 4
   call void @llvm.dbg.declare(metadata %0** %1, metadata !130, metadata !DIExpression()), !dbg !131
   %2 = bitcast %struct.CR* %bounds to %1*
diff --git a/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll b/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
index e80e5e13766..336fc27caac 100644
--- a/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
@@ -20,9 +20,9 @@ entry:
 
 for.body9:                                        ; preds = %for.body9, %entry
   %add19 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39
-  tail call void @llvm.dbg.value(metadata <4 x float> %add19, i64 0, metadata !27, metadata !DIExpression()), !dbg !39
+  tail call void @llvm.dbg.value(metadata <4 x float> %add19, metadata !27, metadata !DIExpression()), !dbg !39
   %add20 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39
-  tail call void @llvm.dbg.value(metadata <4 x float> %add20, i64 0, metadata !28, metadata !DIExpression()), !dbg !39
+  tail call void @llvm.dbg.value(metadata <4 x float> %add20, metadata !28, metadata !DIExpression()), !dbg !39
   br i1 %cond, label %for.end54, label %for.body9, !dbg !44
 
 for.end54:                                        ; preds = %for.body9
@@ -37,7 +37,7 @@ for.end54:                                        ; preds = %for.body9
 
 declare i32 @printf(i8* nocapture, ...) nounwind
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 !llvm.module.flags = !{!56}
 !llvm.dbg.cu = !{!2}
diff --git a/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll b/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll
index 46146c7b8bf..48abb8d00fd 100644
--- a/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll
@@ -12,9 +12,9 @@ target triple = "thumbv7-apple-darwin10"
 
 define i32 @inlineprinter(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize !dbg !9 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !19, metadata !DIExpression()), !dbg !26
-  tail call void @llvm.dbg.value(metadata double %val, i64 0, metadata !20, metadata !DIExpression()), !dbg !26
-  tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !21, metadata !DIExpression()), !dbg !26
+  tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !19, metadata !DIExpression()), !dbg !26
+  tail call void @llvm.dbg.value(metadata double %val, metadata !20, metadata !DIExpression()), !dbg !26
+  tail call void @llvm.dbg.value(metadata i8 %c, metadata !21, metadata !DIExpression()), !dbg !26
   %0 = zext i8 %c to i32, !dbg !27
   %1 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !27
   ret i32 0, !dbg !29
@@ -22,9 +22,9 @@ entry:
 
 define i32 @printer(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize noinline !dbg !0 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !16, metadata !DIExpression()), !dbg !30
-  tail call void @llvm.dbg.value(metadata double %val, i64 0, metadata !17, metadata !DIExpression()), !dbg !30
-  tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !18, metadata !DIExpression()), !dbg !30
+  tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !16, metadata !DIExpression()), !dbg !30
+  tail call void @llvm.dbg.value(metadata double %val, metadata !17, metadata !DIExpression()), !dbg !30
+  tail call void @llvm.dbg.value(metadata i8 %c, metadata !18, metadata !DIExpression()), !dbg !30
   %0 = zext i8 %c to i32, !dbg !31
   %1 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !31
   ret i32 0, !dbg !33
@@ -32,22 +32,22 @@ entry:
 
 declare i32 @printf(i8* nocapture, ...) nounwind
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize !dbg !10 {
 entry:
-  tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !22, metadata !DIExpression()), !dbg !34
-  tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !23, metadata !DIExpression()), !dbg !34
+  tail call void @llvm.dbg.value(metadata i32 %argc, metadata !22, metadata !DIExpression()), !dbg !34
+  tail call void @llvm.dbg.value(metadata i8** %argv, metadata !23, metadata !DIExpression()), !dbg !34
   %0 = sitofp i32 %argc to double, !dbg !35
   %1 = fadd double %0, 5.555552e+05, !dbg !35
-  tail call void @llvm.dbg.value(metadata double %1, i64 0, metadata !24, metadata !DIExpression()), !dbg !35
+  tail call void @llvm.dbg.value(metadata double %1, metadata !24, metadata !DIExpression()), !dbg !35
   %2 = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0)) nounwind, !dbg !36
   %3 = getelementptr inbounds i8, i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !37
   %4 = trunc i32 %argc to i8, !dbg !37
   %5 = add i8 %4, 97, !dbg !37
-  tail call void @llvm.dbg.value(metadata i8* %3, i64 0, metadata !49, metadata !DIExpression()) nounwind, !dbg !38
-  tail call void @llvm.dbg.value(metadata double %1, i64 0, metadata !50, metadata !DIExpression()) nounwind, !dbg !38
-  tail call void @llvm.dbg.value(metadata i8 %5, i64 0, metadata !51, metadata !DIExpression()) nounwind, !dbg !38
+  tail call void @llvm.dbg.value(metadata i8* %3, metadata !49, metadata !DIExpression()) nounwind, !dbg !38
+  tail call void @llvm.dbg.value(metadata double %1, metadata !50, metadata !DIExpression()) nounwind, !dbg !38
+  tail call void @llvm.dbg.value(metadata i8 %5, metadata !51, metadata !DIExpression()) nounwind, !dbg !38
   %6 = zext i8 %5 to i32, !dbg !39
   %7 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %3, double %1, i32 %6) nounwind, !dbg !39
   %8 = tail call i32 @printer(i8* %3, double %1, i8 zeroext %5) nounwind, !dbg !40
diff --git a/llvm/test/CodeGen/ARM/debug-info-qreg.ll b/llvm/test/CodeGen/ARM/debug-info-qreg.ll
index 581b3e915ef..658e730bddd 100644
--- a/llvm/test/CodeGen/ARM/debug-info-qreg.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-qreg.ll
@@ -24,7 +24,7 @@ for.body9:                                        ; preds = %for.body9, %entry
   br i1 undef, label %for.end54, label %for.body9, !dbg !44
 
 for.end54:                                        ; preds = %for.body9
-  tail call void @llvm.dbg.value(metadata <4 x float> %add19, i64 0, metadata !27, metadata !DIExpression()), !dbg !39
+  tail call void @llvm.dbg.value(metadata <4 x float> %add19, metadata !27, metadata !DIExpression()), !dbg !39
   %tmp115 = extractelement <4 x float> %add19, i32 1
   %conv6.i75 = fpext float %tmp115 to double, !dbg !45
   %call.i82 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i32 0, i32 0), double undef, double %conv6.i75, double undef, double undef) nounwind, !dbg !45
@@ -33,7 +33,7 @@ for.end54:                                        ; preds = %for.body9
 
 declare i32 @printf(i8* nocapture, ...) nounwind
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 !llvm.dbg.cu = !{!2}
 !llvm.module.flags = !{!56}
diff --git a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll
index 197746c5f12..53491bd2899 100644
--- a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll
@@ -12,9 +12,9 @@ target triple = "thumbv7-apple-macosx10.6.7"
 
 define i32 @inlineprinter(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize ssp !dbg !0 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !8, metadata !DIExpression()), !dbg !24
-  tail call void @llvm.dbg.value(metadata float %val, i64 0, metadata !10, metadata !DIExpression()), !dbg !25
-  tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !12, metadata !DIExpression()), !dbg !26
+  tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !8, metadata !DIExpression()), !dbg !24
+  tail call void @llvm.dbg.value(metadata float %val, metadata !10, metadata !DIExpression()), !dbg !25
+  tail call void @llvm.dbg.value(metadata i8 %c, metadata !12, metadata !DIExpression()), !dbg !26
   %conv = fpext float %val to double, !dbg !27
   %conv3 = zext i8 %c to i32, !dbg !27
   %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !27
@@ -25,9 +25,9 @@ declare i32 @printf(i8* nocapture, ...) nounwind optsize
 
 define i32 @printer(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize noinline ssp !dbg !6 {
 entry:
-  tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !14, metadata !DIExpression()), !dbg !30
-  tail call void @llvm.dbg.value(metadata float %val, i64 0, metadata !15, metadata !DIExpression()), !dbg !31
-  tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !16, metadata !DIExpression()), !dbg !32
+  tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !14, metadata !DIExpression()), !dbg !30
+  tail call void @llvm.dbg.value(metadata float %val, metadata !15, metadata !DIExpression()), !dbg !31
+  tail call void @llvm.dbg.value(metadata i8 %c, metadata !16, metadata !DIExpression()), !dbg !32
   %conv = fpext float %val to double, !dbg !33
   %conv3 = zext i8 %c to i32, !dbg !33
   %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !33
@@ -36,19 +36,19 @@ entry:
 
 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize ssp !dbg !7 {
 entry:
-  tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !17, metadata !DIExpression()), !dbg !36
-  tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !18, metadata !DIExpression()), !dbg !37
+  tail call void @llvm.dbg.value(metadata i32 %argc, metadata !17, metadata !DIExpression()), !dbg !36
+  tail call void @llvm.dbg.value(metadata i8** %argv, metadata !18, metadata !DIExpression()), !dbg !37
   %conv = sitofp i32 %argc to double, !dbg !38
   %add = fadd double %conv, 5.555552e+05, !dbg !38
   %conv1 = fptrunc double %add to float, !dbg !38
-  tail call void @llvm.dbg.value(metadata float %conv1, i64 0, metadata !22, metadata !DIExpression()), !dbg !38
+  tail call void @llvm.dbg.value(metadata float %conv1, metadata !22, metadata !DIExpression()), !dbg !38
   %call = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0)) nounwind optsize, !dbg !39
   %add.ptr = getelementptr i8, i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !40
   %add5 = add nsw i32 %argc, 97, !dbg !40
   %conv6 = trunc i32 %add5 to i8, !dbg !40
-  tail call void @llvm.dbg.value(metadata i8* %add.ptr, i64 0, metadata !58, metadata !DIExpression()) nounwind, !dbg !41
-  tail call void @llvm.dbg.value(metadata float %conv1, i64 0, metadata !60, metadata !DIExpression()) nounwind, !dbg !42
-  tail call void @llvm.dbg.value(metadata i8 %conv6, i64 0, metadata !62, metadata !DIExpression()) nounwind, !dbg !43
+  tail call void @llvm.dbg.value(metadata i8* %add.ptr, metadata !58, metadata !DIExpression()) nounwind, !dbg !41
+  tail call void @llvm.dbg.value(metadata float %conv1, metadata !60, metadata !DIExpression()) nounwind, !dbg !42
+  tail call void @llvm.dbg.value(metadata i8 %conv6, metadata !62, metadata !DIExpression()) nounwind, !dbg !43
   %conv.i = fpext float %conv1 to double, !dbg !44
   %conv3.i = and i32 %add5, 255, !dbg !44
   %call.i = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %add.ptr, double %conv.i, i32 %conv3.i) nounwind optsize, !dbg !44
@@ -58,7 +58,7 @@ entry:
 
 declare i32 @puts(i8* nocapture) nounwind optsize
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 !llvm.dbg.cu = !{!2}
 !llvm.module.flags = !{!53}
diff --git a/llvm/test/CodeGen/ARM/debug-info-sreg2.ll b/llvm/test/CodeGen/ARM/debug-info-sreg2.ll
index 094b1049978..3b435a1ab29 100644
--- a/llvm/test/CodeGen/ARM/debug-info-sreg2.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-sreg2.ll
@@ -15,7 +15,7 @@ target triple = "thumbv7-apple-macosx10.6.7"
 define void @_Z3foov() optsize ssp !dbg !1 {
 entry:
   %call = tail call float @_Z3barv() optsize, !dbg !11
-  tail call void @llvm.dbg.value(metadata float %call, i64 0, metadata !5, metadata !DIExpression()), !dbg !11
+  tail call void @llvm.dbg.value(metadata float %call, metadata !5, metadata !DIExpression()), !dbg !11
   %call16 = tail call float @_Z2f2v() optsize, !dbg !12
   %cmp7 = fcmp olt float %call, %call16, !dbg !12
   br i1 %cmp7, label %for.body, label %for.end, !dbg !12
@@ -38,7 +38,7 @@ declare float @_Z2f2v() optsize
 
 declare float @_Z2f3f(float) optsize
 
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!20}