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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-03-03 18:13:53 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-03-03 18:13:53 +0000 |
| commit | abcee45b7ad3a07359ac92cc2954f4ef489367ae (patch) | |
| tree | 6a959c604e79d1423a9394b23c71ad0fed7f7615 /llvm/test/CodeGen | |
| parent | 57d1dda5581594ebdfabcb899bd224d037105a1a (diff) | |
| download | bcm5719-llvm-abcee45b7ad3a07359ac92cc2954f4ef489367ae.tar.gz bcm5719-llvm-abcee45b7ad3a07359ac92cc2954f4ef489367ae.zip | |
[X86][AVX] Better support for the variable mask form of VPERMILPD/VPERMILPS
The variable mask form of VPERMILPD/VPERMILPS were only partially implemented, with much of it still performed as an intrinsic.
This patch properly defines the instructions in terms of X86ISD::VPERMILPV, permitting the opcode to be easily combined as a target shuffle.
Differential Revision: http://reviews.llvm.org/D17681
llvm-svn: 262635
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll index 758f2becbe6..7d4d892acf3 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll @@ -22,9 +22,6 @@ declare <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double>, <4 x double>, define <4 x float> @combine_vpermilvar_4f32(<4 x float> %a0) { ; ALL-LABEL: combine_vpermilvar_4f32: ; ALL: # BB#0: -; ALL-NEXT: vmovaps {{.*#+}} xmm1 = [3,2,1,0] -; ALL-NEXT: vpermilps %xmm1, %xmm0, %xmm0 -; ALL-NEXT: vpermilps %xmm1, %xmm0, %xmm0 ; ALL-NEXT: retq %1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 3, i32 2, i32 1, i32 0>) %2 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %1, <4 x i32> <i32 3, i32 2, i32 1, i32 0>) @@ -34,9 +31,6 @@ define <4 x float> @combine_vpermilvar_4f32(<4 x float> %a0) { define <8 x float> @combine_vpermilvar_8f32(<8 x float> %a0) { ; ALL-LABEL: combine_vpermilvar_8f32: ; ALL: # BB#0: -; ALL-NEXT: vmovaps {{.*#+}} ymm1 = [3,2,1,0,2,3,0,1] -; ALL-NEXT: vpermilps %ymm1, %ymm0, %ymm0 -; ALL-NEXT: vpermilps %ymm1, %ymm0, %ymm0 ; ALL-NEXT: retq %1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 2, i32 3, i32 0, i32 1>) %2 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %1, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 2, i32 3, i32 0, i32 1>) @@ -59,9 +53,6 @@ define <2 x double> @combine_vpermilvar_2f64(<2 x double> %a0) { define <4 x double> @combine_vpermilvar_4f64(<4 x double> %a0) { ; ALL-LABEL: combine_vpermilvar_4f64: ; ALL: # BB#0: -; ALL-NEXT: vmovapd {{.*#+}} ymm1 = [2,0,2,0] -; ALL-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 -; ALL-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 ; ALL-NEXT: retq %1 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> <i64 2, i64 0, i64 2, i64 0>) %2 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %1, <4 x i64> <i64 2, i64 0, i64 2, i64 0>) |
