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| author | Tim Northover <tnorthover@apple.com> | 2014-04-30 16:13:34 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-04-30 16:13:34 +0000 |
| commit | a8c577e4544c8b7d8be51c5565cd341e5a4fb38f (patch) | |
| tree | 01a484a62efe2cefca2dca3750d83274b5cb5404 /llvm/test/CodeGen | |
| parent | 7346f062b639a20164f15da77f2989c22aca349b (diff) | |
| download | bcm5719-llvm-a8c577e4544c8b7d8be51c5565cd341e5a4fb38f.tar.gz bcm5719-llvm-a8c577e4544c8b7d8be51c5565cd341e5a4fb38f.zip | |
ARM64: print fp immediates without using scientific notation.
llvm-svn: 207669
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/ARM64/fast-isel-materialize.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM64/vector-imm.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM64/vector-insertion.ll | 2 |
3 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/ARM64/fast-isel-materialize.ll b/llvm/test/CodeGen/ARM64/fast-isel-materialize.ll index fa2daf73dbd..ffac131f0ca 100644 --- a/llvm/test/CodeGen/ARM64/fast-isel-materialize.ll +++ b/llvm/test/CodeGen/ARM64/fast-isel-materialize.ll @@ -3,14 +3,14 @@ ; Materialize using fmov define void @float_(float* %value) { ; CHECK: @float_ -; CHECK: fmov s0, #1.250000e+00 +; CHECK: fmov s0, #1.25000000 store float 1.250000e+00, float* %value, align 4 ret void } define void @double_(double* %value) { ; CHECK: @double_ -; CHECK: fmov d0, #1.250000e+00 +; CHECK: fmov d0, #1.25000000 store double 1.250000e+00, double* %value, align 8 ret void } diff --git a/llvm/test/CodeGen/ARM64/vector-imm.ll b/llvm/test/CodeGen/ARM64/vector-imm.ll index 2a9450f4e29..a84f804c8cd 100644 --- a/llvm/test/CodeGen/ARM64/vector-imm.ll +++ b/llvm/test/CodeGen/ARM64/vector-imm.ll @@ -42,7 +42,7 @@ define <16 x i8> @v_bicimmQ(<16 x i8>* %A) nounwind { define <2 x double> @foo(<2 x double> %bar) nounwind { ; CHECK: foo -; CHECK: fmov.2d v1, #1.000000e+00 +; CHECK: fmov.2d v1, #1.0000000 %add = fadd <2 x double> %bar, <double 1.0, double 1.0> ret <2 x double> %add } @@ -122,13 +122,13 @@ ret <2 x i64> <i64 71777214294589695, i64 71777214294589695> define <4 x i32> @movi_4s_imm_t11() nounwind readnone ssp { entry: ; CHECK-LABEL: movi_4s_imm_t11: -; CHECK: fmov.4s v0, #-3.281250e-01 +; CHECK: fmov.4s v0, #-0.32812500 ret <4 x i32> <i32 3198681088, i32 3198681088, i32 3198681088, i32 3198681088> } define <2 x i64> @movi_2d_imm_t12() nounwind readnone ssp { entry: ; CHECK-LABEL: movi_2d_imm_t12: -; CHECK: fmov.2d v0, #-1.718750e-01 +; CHECK: fmov.2d v0, #-0.17187500 ret <2 x i64> <i64 13818732506632945664, i64 13818732506632945664> } diff --git a/llvm/test/CodeGen/ARM64/vector-insertion.ll b/llvm/test/CodeGen/ARM64/vector-insertion.ll index b9f3fc131e8..0926bcfde9a 100644 --- a/llvm/test/CodeGen/ARM64/vector-insertion.ll +++ b/llvm/test/CodeGen/ARM64/vector-insertion.ll @@ -25,7 +25,7 @@ entry: ret void ; CHECK-LABEL: test1f - ; CHECK: fmov s[[TEMP:[0-9]+]], #1.000000e+00 + ; CHECK: fmov s[[TEMP:[0-9]+]], #1.0000000 ; CHECK: dup.4s v[[TEMP2:[0-9]+]], v[[TEMP]][0] ; CHECK: ins.s v[[TEMP2]][0], v0[0] ; CHECK: str q[[TEMP2]], [x0] |
