MachineOperand/MIParser: Do not print debug-use flag, infer it

The debug-use flag must be set exactly for uses on DBG_VALUEs.  This is
so obvious that it can be trivially inferred while parsing. This will
reduce noise when printing while omitting an information that has little
value to the user.

The parser will keep recognizing the flag for compatibility with old
`.mir` files.

Differential Revision: https://reviews.llvm.org/D53903

llvm-svn: 345671

26 files changed, 110 insertions, 106 deletions

diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll b/llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
index e603af678de..caf0a2eebca 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
@@ -18,7 +18,7 @@ target triple = "aarch64-unknown-linux-gnu"
 %struct.NTCopy = type { i32 }
 
 ; CHECK-LABEL: name: _Z3foo6NTCopy
-; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), 0, !23, !DIExpression(), debug-location !24
+; CHECK: DBG_VALUE %{{[0-9]+}}(p0), 0, !23, !DIExpression(), debug-location !24
 ; Function Attrs: noinline nounwind optnone
 define dso_local i32 @_Z3foo6NTCopy(%struct.NTCopy* %o) #0 !dbg !7 {
 entry:
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll b/llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
index 256eb37f6d4..2945d65d3e2 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
@@ -15,7 +15,7 @@ entry:
 }
 
 ; CHECK-LABEL: name: debug_declare_vla
-; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), 0, !14, !DIExpression(), debug-location !15
+; CHECK: DBG_VALUE %{{[0-9]+}}(p0), 0, !14, !DIExpression(), debug-location !15
 define void @debug_declare_vla(i32 %in) #0 !dbg !13 {
 entry:
   %vla.addr = alloca i32, i32 %in
@@ -27,10 +27,10 @@ entry:
 ; CHECK: [[IN:%[0-9]+]]:_(s32) = COPY $w0
 define void @debug_value(i32 %in) #0 !dbg !16 {
   %addr = alloca i32
-; CHECK: DBG_VALUE debug-use [[IN]](s32), debug-use $noreg, !17, !DIExpression(), debug-location !18
+; CHECK: DBG_VALUE [[IN]](s32), $noreg, !17, !DIExpression(), debug-location !18
   call void @llvm.dbg.value(metadata i32 %in, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
   store i32 %in, i32* %addr
-; CHECK: DBG_VALUE debug-use %1(p0), debug-use $noreg, !17, !DIExpression(DW_OP_deref), debug-location !18
+; CHECK: DBG_VALUE %1(p0), $noreg, !17, !DIExpression(DW_OP_deref), debug-location !18
   call void @llvm.dbg.value(metadata i32* %addr, i64 0, metadata !17, metadata !DIExpression(DW_OP_deref)), !dbg !18
 ; CHECK: DBG_VALUE 123, 0, !17, !DIExpression(), debug-location !18
   call void @llvm.dbg.value(metadata i32 123, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir b/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
index 1528a809771..c64e2f78ab3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
@@ -36,8 +36,8 @@ body: |
   bb.0:
     liveins: $w0
     %0:_(s32) = COPY $w0
-    ; CHECK: DBG_VALUE debug-use %0(s32), debug-use $noreg, !7, !DIExpression(), debug-location !9
-    DBG_VALUE debug-use %0(s32), debug-use $noreg, !7, !DIExpression(), debug-location !9
+    ; CHECK: DBG_VALUE %0(s32), $noreg, !7, !DIExpression(), debug-location !9
+    DBG_VALUE %0(s32), $noreg, !7, !DIExpression(), debug-location !9
 
     ; CHECK: DBG_VALUE $noreg, 0, !7, !DIExpression(), debug-location !9
     DBG_VALUE $noreg, 0, !7, !DIExpression(), debug-location !9
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
index f75d5629478..72fbfad89c2 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
@@ -46,11 +46,11 @@ body: |
     ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
     ; CHECK: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY]]
     ; CHECK: $w0 = COPY [[ADDWrr]]
-    ; CHECK: DBG_VALUE debug-use [[ADDWrr]], debug-use $noreg, !7, !DIExpression(), debug-location !9
+    ; CHECK: DBG_VALUE [[ADDWrr]], $noreg, !7, !DIExpression(), debug-location !9
     %0:gpr(s32) = COPY $w0
     %1:gpr(s32) = G_ADD %0, %0
     $w0 = COPY %1(s32)
-    DBG_VALUE debug-use %1(s32), debug-use $noreg, !7, !DIExpression(), debug-location !9
+    DBG_VALUE %1(s32), $noreg, !7, !DIExpression(), debug-location !9
 ...
 
 ---
@@ -62,7 +62,7 @@ body: |
     liveins: $w0
     ; CHECK-LABEL: name: test_dbg_value_dead
     ; CHECK-NOT: COPY
-    ; CHECK: DBG_VALUE debug-use $noreg, debug-use $noreg, !7, !DIExpression(), debug-location !9
+    ; CHECK: DBG_VALUE $noreg, $noreg, !7, !DIExpression(), debug-location !9
     %0:gpr(s32) = COPY $w0
-    DBG_VALUE debug-use %0(s32), debug-use $noreg, !7, !DIExpression(), debug-location !9
+    DBG_VALUE %0(s32), $noreg, !7, !DIExpression(), debug-location !9
 ...
diff --git a/llvm/test/CodeGen/AArch64/phi-dbg.ll b/llvm/test/CodeGen/AArch64/phi-dbg.ll
index 0b5c6677acd..4f7c005f802 100644
--- a/llvm/test/CodeGen/AArch64/phi-dbg.ll
+++ b/llvm/test/CodeGen/AArch64/phi-dbg.ll
@@ -35,11 +35,11 @@ bb2:
 bb3:
 ; CHECK: bb.3.bb3:
 ; CHECK:   [[PHIDEST:%[0-9]+]]:gpr32 = COPY [[PHIREG]]
-; CHECK-NEXT:   DBG_VALUE debug-use [[PHIDEST]]
+; CHECK-NEXT:   DBG_VALUE [[PHIDEST]]
   %.0 = phi i32 [ 12, %bb2 ], [ 1, %entry ]
   call void @llvm.dbg.value(metadata i32 %.0, i64 0, metadata !15, metadata !13), !dbg !16
 ; CHECK: [[ADD:%[0-9]+]]:gpr32 = nsw ADDWrr [[PHIDEST]]
-; CHECK-NEXT: DBG_VALUE debug-use [[ADD]]
+; CHECK-NEXT: DBG_VALUE [[ADD]]
   %v5 = add nsw i32 %.0, %a0, !dbg !22
   call void @llvm.dbg.value(metadata i32 %v5, i64 0, metadata !15, metadata !13), !dbg !16
   ret i32 %v5, !dbg !23
diff --git a/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir b/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir
index ec0faf7ab66..f3a1168885f 100644
--- a/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir
+++ b/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir
@@ -63,7 +63,7 @@ body:             |
     ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345
     ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
     ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec
-    ; GCN: DBG_VALUE debug-use %5:sreg_64_xexec, debug-use $noreg
+    ; GCN: DBG_VALUE %5:sreg_64_xexec, $noreg
     ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]]
     %0:sreg_32_xm0 = S_MOV_B32 12345
     %1:vgpr_32 = IMPLICIT_DEF
@@ -71,7 +71,7 @@ body:             |
     %3:vgpr_32 = IMPLICIT_DEF
 
     %4:vgpr_32, %5:sreg_64_xexec = V_ADD_I32_e64 %0, %1, implicit $exec
-    DBG_VALUE debug-use %5, debug-use $noreg
+    DBG_VALUE %5, $noreg
     S_ENDPGM implicit %4
 
 ...
diff --git a/llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir b/llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
index 693b7d827c5..d69bbda463c 100644
--- a/llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
+++ b/llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
@@ -5,7 +5,7 @@
 # a slot index.
 
 # CHECK: %13.sub2:sgpr_128 = S_MOV_B32 0
-# CHECK: DBG_VALUE{{.*}}debug-use %13.sub2
+# CHECK: DBG_VALUE{{.*}} %13.sub2
 
 --- |
   define amdgpu_kernel void @test(i32 addrspace(1)* %out) { ret void }
diff --git a/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir b/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
index 182096305f4..3d52f5aad04 100644
--- a/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
+++ b/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
@@ -169,7 +169,7 @@
 ---
 
 # CHECK: name: sched_dbg_value_crash
-# CHECK: DBG_VALUE debug-use %99, debug-use $noreg, !5, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !8
+# CHECK: DBG_VALUE %99, $noreg, !5, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !8
 
 name:            sched_dbg_value_crash
 alignment:       0
@@ -319,7 +319,7 @@ body:             |
     %124:vgpr_32 = IMPLICIT_DEF
     %125:vgpr_32 = IMPLICIT_DEF
     %126:vgpr_32 = IMPLICIT_DEF
-    DBG_VALUE debug-use %103, debug-use _, !5, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !8
+    DBG_VALUE %103, _, !5, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !8
     ADJCALLSTACKUP 0, 0, implicit-def $sgpr32, implicit $sgpr32
     %127:sreg_64 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @func + 4, target-flags(amdgpu-rel32-hi) @func + 4, implicit-def dead $scc
     $sgpr4 = COPY $sgpr101
diff --git a/llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir b/llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir
index 76f1523f779..ce33dcf52ec 100644
--- a/llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir
+++ b/llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir
@@ -120,19 +120,19 @@ body:             |
   bb.0.entry:
     liveins: $r0, $r1, $r2, $r3, $lr, $r7
 
-    DBG_VALUE debug-use $r0, debug-use $noreg, !18, !27, debug-location !28
-    DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28
-    DBG_VALUE debug-use $r2, debug-use $noreg, !20, !27, debug-location !28
-    DBG_VALUE debug-use $r3, debug-use $noreg, !21, !27, debug-location !28
+    DBG_VALUE $r0, $noreg, !18, !27, debug-location !28
+    DBG_VALUE $r1, $noreg, !19, !27, debug-location !28
+    DBG_VALUE $r2, $noreg, !20, !27, debug-location !28
+    DBG_VALUE $r3, $noreg, !21, !27, debug-location !28
     t2CMPri $r3, 4, 14, $noreg, implicit-def $cpsr, debug-location !31
     t2Bcc %bb.2.if.end, 2, killed $cpsr
 
   bb.1:
     liveins: $lr, $r7
 
-    DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28
+    DBG_VALUE $r1, $noreg, !19, !27, debug-location !28
     $r0 = t2MOVi -1, 14, $noreg, $noreg
-    DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28
+    DBG_VALUE $r1, $noreg, !19, !27, debug-location !28
     tBX_RET 14, $noreg, implicit $r0, debug-location !34
 
   bb.2.if.end:
@@ -142,12 +142,12 @@ body:             |
     frame-setup CFI_INSTRUCTION def_cfa_offset 8
     frame-setup CFI_INSTRUCTION offset $lr, -4
     frame-setup CFI_INSTRUCTION offset $r7, -8
-    DBG_VALUE debug-use $r0, debug-use $noreg, !18, !27, debug-location !28
-    DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28
-    DBG_VALUE debug-use $r2, debug-use $noreg, !20, !27, debug-location !28
-    DBG_VALUE debug-use $r3, debug-use $noreg, !21, !27, debug-location !28
+    DBG_VALUE $r0, $noreg, !18, !27, debug-location !28
+    DBG_VALUE $r1, $noreg, !19, !27, debug-location !28
+    DBG_VALUE $r2, $noreg, !20, !27, debug-location !28
+    DBG_VALUE $r3, $noreg, !21, !27, debug-location !28
     $r1 = COPY killed $r2, debug-location !32
-    DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28
+    DBG_VALUE $r1, $noreg, !19, !27, debug-location !28
     $r2 = COPY killed $r3, debug-location !32
     tBL 14, $noreg, @g, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit-def $sp, debug-location !32
     $r0 = t2MOVi 0, 14, $noreg, $noreg
diff --git a/llvm/test/CodeGen/ARM/dbg-range-extension.mir b/llvm/test/CodeGen/ARM/dbg-range-extension.mir
index 0dd9ed2b207..f2b174a8ac0 100644
--- a/llvm/test/CodeGen/ARM/dbg-range-extension.mir
+++ b/llvm/test/CodeGen/ARM/dbg-range-extension.mir
@@ -23,37 +23,37 @@
 # CHECK: [[VAR_I:![0-9]+]] = !DILocalVariable(name: "i",
 
 # CHECK: bb.0.entry
-# CHECK: DBG_VALUE debug-use $r0, debug-use $noreg, [[VAR_A]]
-# CHECK: DBG_VALUE debug-use [[REG_A:\$r[0-9]+]], debug-use $noreg, [[VAR_A]]
-# CHECK: DBG_VALUE debug-use [[REG_B:\$r[0-9]+]], debug-use $noreg, [[VAR_B]]
+# CHECK: DBG_VALUE $r0, $noreg, [[VAR_A]]
+# CHECK: DBG_VALUE [[REG_A:\$r[0-9]+]], $noreg, [[VAR_A]]
+# CHECK: DBG_VALUE [[REG_B:\$r[0-9]+]], $noreg, [[VAR_B]]
 
 # CHECK: bb.1.if.then
-# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]]
-# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]]
-# CHECK: DBG_VALUE debug-use [[REG_C:\$r[0-9]+]], debug-use $noreg, [[VAR_C]]
+# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]]
+# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]]
+# CHECK: DBG_VALUE [[REG_C:\$r[0-9]+]], $noreg, [[VAR_C]]
 # CHECK: DBG_VALUE 1, 0, [[VAR_I]]
 
 # CHECK: bb.2.for.body
-# CHECK: DBG_VALUE debug-use [[REG_I:\$r[0-9]+]], debug-use $noreg, [[VAR_I]]
-# CHECK: DBG_VALUE debug-use [[REG_C]], debug-use $noreg, [[VAR_C]]
-# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]]
-# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]]
-# CHECK: DBG_VALUE debug-use [[REG_I]], debug-use $noreg, [[VAR_I]]
+# CHECK: DBG_VALUE [[REG_I:\$r[0-9]+]], $noreg, [[VAR_I]]
+# CHECK: DBG_VALUE [[REG_C]], $noreg, [[VAR_C]]
+# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]]
+# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]]
+# CHECK: DBG_VALUE [[REG_I]], $noreg, [[VAR_I]]
 
 # CHECK: bb.3.for.cond
-# CHECK: DBG_VALUE debug-use [[REG_C]], debug-use $noreg, [[VAR_C]]
-# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]]
-# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]]
-# CHECK: DBG_VALUE debug-use [[REG_I]], debug-use $noreg, [[VAR_I]]
+# CHECK: DBG_VALUE [[REG_C]], $noreg, [[VAR_C]]
+# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]]
+# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]]
+# CHECK: DBG_VALUE [[REG_I]], $noreg, [[VAR_I]]
 
 # CHECK: bb.4.for.cond.cleanup
-# CHECK: DBG_VALUE debug-use [[REG_C]], debug-use $noreg, [[VAR_C]]
-# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]]
-# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]]
+# CHECK: DBG_VALUE [[REG_C]], $noreg, [[VAR_C]]
+# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]]
+# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]]
 
 # CHECK: bb.5.if.end
-# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]]
-# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]]
+# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]]
+# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]]
 --- |
   ; ModuleID = '/data/kwalker/work/OpenSource-llvm/llvm/test/CodeGen/ARM/dbg-range-extension.ll'
   source_filename = "/data/kwalker/work/OpenSource-llvm/llvm/test/CodeGen/ARM/dbg-range-extension.ll"
@@ -219,14 +219,14 @@ body:             |
     frame-setup CFI_INSTRUCTION offset $r6, -16
     frame-setup CFI_INSTRUCTION offset $r5, -20
     frame-setup CFI_INSTRUCTION offset $r4, -24
-    DBG_VALUE debug-use $r0, debug-use $noreg, !13, !20, debug-location !21
+    DBG_VALUE $r0, $noreg, !13, !20, debug-location !21
     $r4 = MOVr killed $r0, 14, $noreg, $noreg
-    DBG_VALUE debug-use $r4, debug-use $noreg, !13, !20, debug-location !21
+    DBG_VALUE $r4, $noreg, !13, !20, debug-location !21
     $r0 = MOVi 10, 14, $noreg, _, debug-location !22
     $r1 = MOVi 11, 14, $noreg, _, debug-location !22
     BL @func2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit-def $sp, implicit-def $r0, debug-location !22
     $r5 = MOVr killed $r0, 14, $noreg, _, debug-location !22
-    DBG_VALUE debug-use $r5, debug-use $noreg, !14, !20, debug-location !23
+    DBG_VALUE $r5, $noreg, !14, !20, debug-location !23
     CMPri $r4, 0, 14, $noreg, implicit-def $cpsr, debug-location !25
     Bcc %bb.5.if.end, 0, killed $cpsr
   
@@ -237,7 +237,7 @@ body:             |
     $r1 = MOVi 13, 14, $noreg, _, debug-location !26
     BL @func2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit-def $sp, implicit-def $r0, debug-location !26
     $r6 = MOVr killed $r0, 14, $noreg, _, debug-location !26
-    DBG_VALUE debug-use $r6, debug-use $noreg, !15, !20, debug-location !27
+    DBG_VALUE $r6, $noreg, !15, !20, debug-location !27
     $r7 = MOVi 1, 14, $noreg, $noreg
     DBG_VALUE 1, 0, !18, !20, debug-location !28
     B %bb.3.for.cond
@@ -249,12 +249,12 @@ body:             |
     $r0 = MOVr $r7, 14, $noreg, _, debug-location !36
     BL @func2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit-def $sp, implicit-def dead $r0, debug-location !36
     $r7 = ADDri killed $r7, 1, 14, $noreg, _, debug-location !38
-    DBG_VALUE debug-use $r7, debug-use $noreg, !18, !20, debug-location !28
+    DBG_VALUE $r7, $noreg, !18, !20, debug-location !28
   
   bb.3.for.cond:
     liveins: $r4, $r5, $r6, $r7
   
-    DBG_VALUE debug-use $r7, debug-use $noreg, !18, !20, debug-location !28
+    DBG_VALUE $r7, $noreg, !18, !20, debug-location !28
     CMPrr $r7, $r4, 14, $noreg, implicit-def $cpsr, debug-location !33
     Bcc %bb.2.for.body, 11, killed $cpsr, debug-location !33
   
diff --git a/llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir b/llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir
index 8d0688ef01d..ec42e7df3b2 100644
--- a/llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir
+++ b/llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir
@@ -33,7 +33,7 @@
   ; hopefully, triggering an assert).
 
   ; CHECK: BUNDLE implicit-def dead $itstate{{.*}} {
-  ; CHECK: DBG_VALUE debug-use $r1, debug-use $noreg, !"u"
+  ; CHECK: DBG_VALUE $r1, $noreg, !"u"
   ; CHECK-NOT: DBG_VALUE killed $r1, $noreg, !"u"
 
   declare arm_aapcscc void @g(%struct.s*, i8*, i32) #1
@@ -131,23 +131,23 @@ body:             |
   bb.0.entry:
     liveins: $r0, $r1, $r2, $r3, $lr, $r7
 
-    DBG_VALUE debug-use $r0, debug-use $noreg, !18, !27, debug-location !28
-    DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28
-    DBG_VALUE debug-use $r2, debug-use $noreg, !20, !27, debug-location !28
-    DBG_VALUE debug-use $r3, debug-use $noreg, !21, !27, debug-location !28
+    DBG_VALUE $r0, $noreg, !18, !27, debug-location !28
+    DBG_VALUE $r1, $noreg, !19, !27, debug-location !28
+    DBG_VALUE $r2, $noreg, !20, !27, debug-location !28
+    DBG_VALUE $r3, $noreg, !21, !27, debug-location !28
     t2CMPri $r3, 4, 14, $noreg, implicit-def $cpsr, debug-location !31
-    DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28
+    DBG_VALUE $r1, $noreg, !19, !27, debug-location !28
     $r0 = t2MOVi -1, 3, $cpsr, $noreg, implicit undef $r0
-    DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28
+    DBG_VALUE $r1, $noreg, !19, !27, debug-location !28
     tBX_RET 3, $cpsr, implicit $r0, debug-location !34
     $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr
     frame-setup CFI_INSTRUCTION def_cfa_offset 8
     frame-setup CFI_INSTRUCTION offset $lr, -4
     frame-setup CFI_INSTRUCTION offset $r7, -8
-    DBG_VALUE debug-use $r0, debug-use $noreg, !18, !27, debug-location !28
-    DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28
-    DBG_VALUE debug-use $r2, debug-use $noreg, !20, !27, debug-location !28
-    DBG_VALUE debug-use $r3, debug-use $noreg, !21, !27, debug-location !28
+    DBG_VALUE $r0, $noreg, !18, !27, debug-location !28
+    DBG_VALUE $r1, $noreg, !19, !27, debug-location !28
+    DBG_VALUE $r2, $noreg, !20, !27, debug-location !28
+    DBG_VALUE $r3, $noreg, !21, !27, debug-location !28
     $r1 = tMOVr killed $r2, 14, $noreg, debug-location !32
     $r2 = tMOVr killed $r3, 14, $noreg, debug-location !32
     tBL 14, $noreg, @g, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit-def $sp, debug-location !32
diff --git a/llvm/test/CodeGen/Hexagon/early-if-debug.mir b/llvm/test/CodeGen/Hexagon/early-if-debug.mir
index 27e6124d352..b76f41019a0 100644
--- a/llvm/test/CodeGen/Hexagon/early-if-debug.mir
+++ b/llvm/test/CodeGen/Hexagon/early-if-debug.mir
@@ -6,11 +6,11 @@
 # CHECK: %0:intregs = COPY $r0
 # CHECK: %1:predregs = C2_cmpeqi %0, 0
 # CHECK: %2:intregs = A2_tfrsi 123
-# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
-# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
-# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
-# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
-# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
+# CHECK: DBG_VALUE %0, $noreg
+# CHECK: DBG_VALUE %0, $noreg
+# CHECK: DBG_VALUE %0, $noreg
+# CHECK: DBG_VALUE %0, $noreg
+# CHECK: DBG_VALUE %0, $noreg
 # CHECK: %3:intregs = A2_tfrsi 321
 # CHECK: %5:intregs = C2_mux %1, %2, %3
 
@@ -40,11 +40,11 @@ body:             |
     J2_jump %bb.1, implicit-def dead $pc
 
   bb.1:
-    DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
-    DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
-    DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
-    DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
-    DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
+    DBG_VALUE %0, $noreg, !1, !1
+    DBG_VALUE %0, $noreg, !1, !1
+    DBG_VALUE %0, $noreg, !1, !1
+    DBG_VALUE %0, $noreg, !1, !1
+    DBG_VALUE %0, $noreg, !1, !1
     %3 = A2_tfrsi 321
 
   bb.2:
diff --git a/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir b/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
index 3388ef714d4..384c6bf57c9 100644
--- a/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
+++ b/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
@@ -193,8 +193,8 @@ body:             |
     CFI_INSTRUCTION def_cfa_offset 8
     CFI_INSTRUCTION offset $esi, -8
     $esi = MOV32rm $esp, 1, _, 8, _ :: (load 4 from %fixed-stack.2)
-    DBG_VALUE debug-use $esp, 0, !26, !10, debug-location !25
-    DBG_VALUE debug-use $esp, 0, !23, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_deref), debug-location !25
+    DBG_VALUE $esp, 0, !26, !10, debug-location !25
+    DBG_VALUE $esp, 0, !23, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_deref), debug-location !25
     CALLpcrel32 @getString, csr_32, implicit $esp, implicit-def $esp, implicit-def $eax, debug-location !29
     $ecx = MOV32rm $eax, 1, _, 0, _, debug-location !29 :: (dereferenceable load 4 from %ir.1)
     $edx = MOV32rm $eax, 1, _, 4, _, debug-location !29 :: (dereferenceable load 4 from %ir.1 + 4)
@@ -245,7 +245,7 @@ body:             |
   bb.0.entry:
     $eax = MOV32rm $esp, 1, _, 4, _ :: (load 4 from %fixed-stack.1)
     $eax = MOV32rm killed $eax, 1, _, 0, _, debug-location !34 :: (load 4 from %ir.0)
-    DBG_VALUE debug-use $eax, 0, !35, !DIExpression(DW_OP_constu, 4, DW_OP_minus), debug-location !34
+    DBG_VALUE $eax, 0, !35, !DIExpression(DW_OP_constu, 4, DW_OP_minus), debug-location !34
     $eax = ADD32rm killed $eax, $esp, 1, _, 8, _, implicit-def dead $eflags, debug-location !36 :: (load 4 from %fixed-stack.0)
     RET 0, $eax, debug-location !36
 
diff --git a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
index ec819628f44..8b6c5cbf526 100644
--- a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
+++ b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
@@ -59,10 +59,14 @@ stack:
 body: |
   bb.0.entry:
     liveins: $edi
-    ; CHECK: DBG_VALUE debug-use $noreg, 0, !11, !DIExpression(), debug-location !12
+    ; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12
+    ; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12
     ; CHECK: $eax = COPY %0, debug-location !13
     ; CHECK: RETQ $eax, debug-location !13
     %0 = COPY $edi
+    DBG_VALUE _, 0, !12, !DIExpression(), debug-location !13
+    ; Test whether debug-use is still recognized for compatibility with old
+    ; files.
     DBG_VALUE debug-use _, 0, !12, !DIExpression(), debug-location !13
     MOV32mr %stack.0.x.addr, 1, _, 0, _, %0
     $eax = COPY %0, debug-location !14
diff --git a/llvm/test/CodeGen/MIR/X86/pr38773.mir b/llvm/test/CodeGen/MIR/X86/pr38773.mir
index 0cf0bb25b9e..19b0debf297 100644
--- a/llvm/test/CodeGen/MIR/X86/pr38773.mir
+++ b/llvm/test/CodeGen/MIR/X86/pr38773.mir
@@ -97,8 +97,8 @@ body:             |
     IDIV32r killed renamable $ecx, implicit-def $eax, implicit-def dead $edx, implicit-def dead $eflags, implicit $eax, implicit killed $edx
     renamable $ecx = COPY $eax
     ; CHECK:        IDIV32r killed renamable $ecx
-    ; CHECK-NEXT:   DBG_VALUE debug-use $eax, debug-use $noreg, !12, !DIExpression(), debug-location !13
-    DBG_VALUE debug-use $ecx, debug-use $noreg, !12, !DIExpression(), debug-location !13
+    ; CHECK-NEXT:   DBG_VALUE $eax, $noreg, !12, !DIExpression(), debug-location !13
+    DBG_VALUE $ecx, $noreg, !12, !DIExpression(), debug-location !13
     $eax = COPY killed renamable $ecx
     RET 0, $eax
 
diff --git a/llvm/test/CodeGen/PowerPC/debuginfo-split-int.ll b/llvm/test/CodeGen/PowerPC/debuginfo-split-int.ll
index 5a1e409441b..e12d5e5d220 100644
--- a/llvm/test/CodeGen/PowerPC/debuginfo-split-int.ll
+++ b/llvm/test/CodeGen/PowerPC/debuginfo-split-int.ll
@@ -27,9 +27,9 @@ target triple = "ppc32"
 ;
 ; High 32 bits in R3, low 32 bits in R4
 ; CHECK: %0:gprc = COPY $r3
-; CHECK: DBG_VALUE debug-use %0, debug-use $noreg, [[DL]], !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; CHECK: DBG_VALUE %0, $noreg, [[DL]], !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 ; CHECK: %1:gprc = COPY $r4
-; CHECK: DBG_VALUE debug-use %1, debug-use $noreg, [[DL]], !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; CHECK: DBG_VALUE %1, $noreg, [[DL]], !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 define void @bar() local_unnamed_addr #0 !dbg !6 {
   %1 = alloca i64, align 8
   %2 = tail call i64 @foo()
diff --git a/llvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll b/llvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll
index 3830589b4cb..b49f363ed80 100644
--- a/llvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll
+++ b/llvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll
@@ -34,7 +34,7 @@ define i64 @foo(i64 %bar1, i64 %bar2, i64 %bar3, i64 %bar4, i64 %bar5) local_unn
 ; We expect to find a DBG_VALUE refering to the metadata id for bar5, using the lowest
 ; of the two fixed stack offsets found earlier.
 ; CHECK-LABEL: body:
-; CHECK: DBG_VALUE debug-use $r1, 0, !17, !DIExpression(DW_OP_plus_uconst, 8)
+; CHECK: DBG_VALUE $r1, 0, !17, !DIExpression(DW_OP_plus_uconst, 8)
 entry:
   tail call void @llvm.dbg.value(metadata i64 %bar1, metadata !13, metadata !DIExpression()), !dbg !18
   tail call void @llvm.dbg.value(metadata i64 %bar2, metadata !14, metadata !DIExpression()), !dbg !19
diff --git a/llvm/test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir b/llvm/test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir
index 3c339bb013d..8fa3d82a966 100644
--- a/llvm/test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir
+++ b/llvm/test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir
@@ -36,7 +36,7 @@ tracksRegLiveness: true
 body:             |
   bb.0.entry:
     %0:gr16_abcd = MOV16ri 0
-    DBG_VALUE debug-use %0.sub_8bit:gr16_abcd, debug-use $noreg, !11, !DIExpression(), debug-location !13
+    DBG_VALUE %0.sub_8bit:gr16_abcd, $noreg, !11, !DIExpression(), debug-location !13
     undef %6.sub_8bit:gr16_abcd = COPY killed %0.sub_8bit
     dead $dx = COPY killed %6
 
@@ -48,4 +48,4 @@ body:             |
 #
 # CHECK:      bb.0.entry:
 # CHECK-NEXT:    $dx = MOV16ri 0
-# CHECK-NEXT:    DBG_VALUE debug-use $dl,
+# CHECK-NEXT:    DBG_VALUE $dl,
diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
index 1a9221ae9e9..def14391a51 100644
--- a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
+++ b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
@@ -207,7 +207,7 @@ body:             |
     liveins: $rdi
   
     dead renamable $al = MOV8rm $rsp, 1, $noreg, -121, $noreg 
-    DBG_VALUE debug-use $al, debug-use $noreg, !16, !DIExpression(), debug-location !19
+    DBG_VALUE $al, $noreg, !16, !DIExpression(), debug-location !19
     renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
     JMP_1 %bb.1
 ...
diff --git a/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir b/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir
index cd316dea88b..0a8af06b9ab 100644
--- a/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir
+++ b/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir
@@ -37,7 +37,7 @@ body:             |
     %0:gr16_abcd = MOV16ri 1
 
   bb.1:
-    DBG_VALUE debug-use %0.sub_8bit_hi, debug-use $noreg, !7, !DIExpression(), debug-location !9
+    DBG_VALUE %0.sub_8bit_hi, $noreg, !7, !DIExpression(), debug-location !9
     %1:gr16 = COPY %0
     %2:gr16 = COPY %0
 
diff --git a/llvm/test/CodeGen/X86/lea-opt-with-debug.mir b/llvm/test/CodeGen/X86/lea-opt-with-debug.mir
index 34525d73ea7..a1cf2041db6 100644
--- a/llvm/test/CodeGen/X86/lea-opt-with-debug.mir
+++ b/llvm/test/CodeGen/X86/lea-opt-with-debug.mir
@@ -98,7 +98,7 @@ body:             |
     ; CHECK: %3:gr64_nosp = LEA64r %2, 2, %2, 0, $noreg, debug-location !13
     ; CHECK-NEXT: %4:gr64 = LEA64r %1, 4, %3, 0, $noreg, debug-location !13
     ; CHECK-NOT: %0:gr64 = LEA64r %1, 4, %3, 8, $noreg, debug-location !14
-    ; CHECK: DBG_VALUE debug-use %4, debug-use $noreg, !11, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_stack_value), debug-location !15
+    ; CHECK: DBG_VALUE %4, $noreg, !11, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_stack_value), debug-location !15
 
     %1 = MOV64rm $rip, 1, $noreg, @c, $noreg, debug-location !13 :: (dereferenceable load 8 from @c)
     %2 = MOVSX64rm32 $rip, 1, $noreg, @a, $noreg, debug-location !13 :: (dereferenceable load 4 from @a)
@@ -107,7 +107,7 @@ body:             |
     %5 = COPY %4.sub_32bit, debug-location !13
     MOV32mr $rip, 1, $noreg, @d, $noreg, killed %5, debug-location !13 :: (store 4 into @d)
     %0 = LEA64r %1, 4, %3, 8, $noreg, debug-location !14
-    DBG_VALUE debug-use %0, debug-use $noreg, !11, !DIExpression(), debug-location !15
+    DBG_VALUE %0, $noreg, !11, !DIExpression(), debug-location !15
 
     ; CHECK-LABEL: bb.1 (%ir-block.8):
     ; CHECK: %6:gr32 = MOV32rm %4, 1, $noreg, 8, $noreg, debug-location !17 :: (load 4 from %ir.7)
diff --git a/llvm/test/CodeGen/X86/machine-cp-debug.mir b/llvm/test/CodeGen/X86/machine-cp-debug.mir
index a7fcd9801e7..a3230e8910c 100644
--- a/llvm/test/CodeGen/X86/machine-cp-debug.mir
+++ b/llvm/test/CodeGen/X86/machine-cp-debug.mir
@@ -19,5 +19,5 @@ body: |
   bb.0:
     liveins: $eax
     $ebx = COPY $eax
-    DBG_VALUE debug-use $ebx, debug-use _, !1, !1
+    DBG_VALUE $ebx, _, !1, !1
 ...
diff --git a/llvm/test/CodeGen/X86/opt_phis.mir b/llvm/test/CodeGen/X86/opt_phis.mir
index e282a92e201..f00ee76385d 100644
--- a/llvm/test/CodeGen/X86/opt_phis.mir
+++ b/llvm/test/CodeGen/X86/opt_phis.mir
@@ -27,7 +27,7 @@ body:             |
 
   bb.1:
     %1:gr32 = PHI %0, %bb.0, %2, %bb.1
-    DBG_VALUE debug-use %1, debug-use _, !7, !DIExpression(), debug-location !6
+    DBG_VALUE %1, _, !7, !DIExpression(), debug-location !6
     %2:gr32 = IMPLICIT_DEF
     JMP_1 %bb.1
 ...
diff --git a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
index f4f69b60279..079374752b1 100644
--- a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
+++ b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
@@ -251,8 +251,8 @@ body:             |
     liveins: $esi, $rdi, $r14, $rbx, $rbp
 
     ; CHECK:      [[REGISTER:\$r[a-z0-9]+]] = LEA64r {{\$r[a-z0-9]+}}, 1, $noreg, -20, $noreg
-    ; CHECK-NEXT: DBG_VALUE debug-use [[REGISTER]], debug-use $noreg, ![[J_VAR]], !DIExpression(), debug-location ![[J_LOC]]
-    ; CHECK-NEXT: DBG_VALUE debug-use [[REGISTER]], debug-use $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
+    ; CHECK-NEXT: DBG_VALUE [[REGISTER]], $noreg, ![[J_VAR]], !DIExpression(), debug-location ![[J_LOC]]
+    ; CHECK-NEXT: DBG_VALUE [[REGISTER]], $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
 
     frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
     CFI_INSTRUCTION def_cfa_offset 16
@@ -268,8 +268,8 @@ body:             |
     $rbx = MOV64rr $rdi
     CALL64pcrel32 @_ZN1lC2Ei, csr_64, implicit $rsp, implicit $rdi, implicit $esi, implicit-def $rsp
     $rdi = LEA64r $rbx, 1, $noreg, 8, $noreg
-    DBG_VALUE debug-use $rdi, debug-use $noreg, !20, !17, debug-location !27
-    DBG_VALUE debug-use $rdi, debug-use $noreg, !10, !17, debug-location !18
+    DBG_VALUE $rdi, $noreg, !20, !17, debug-location !27
+    DBG_VALUE $rdi, $noreg, !10, !17, debug-location !18
     $rax = MOV64rm $rbx, 1, $noreg, 16, $noreg :: (load 8)
     MOV64mr $rbx, 1, $noreg, 8, $noreg, killed $rax :: (store 8)
     MOV64mr $rbx, 1, $noreg, 24, $noreg, $rdi :: (store 8)
@@ -286,9 +286,9 @@ body:             |
     $rsi = CMOVNE64rr killed $rsi, $rdx, implicit killed $eflags
     $rsi = OR64rr killed $rsi, killed $rcx, implicit-def $eflags
     $rcx = LEA64r $rbp, 1, $noreg, -20, $noreg
-    DBG_VALUE debug-use $rcx, debug-use $noreg, !46, !17, debug-location !48
-    DBG_VALUE debug-use $rcx, debug-use $noreg, !39, !17, debug-location !44
-    DBG_VALUE debug-use $rbp, -20, !29, !17, debug-location !36
+    DBG_VALUE $rcx, $noreg, !46, !17, debug-location !48
+    DBG_VALUE $rcx, $noreg, !39, !17, debug-location !44
+    DBG_VALUE $rbp, -20, !29, !17, debug-location !36
     $rcx = CMOVNE64rr killed $rcx, killed $rdx, implicit killed $eflags
     $rcx = OR64rr killed $rcx, killed $rsi, implicit-def dead $eflags
     $rdx = MOVSX64rm32 $rbx, 1, $noreg, 0, $noreg :: (load 4, align 8)
diff --git a/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir b/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir
index 0286e6e68bf..25e6992b7b7 100644
--- a/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir
+++ b/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir
@@ -62,7 +62,7 @@
 # CHECK-NOT: $eax = COPY $edi
 # CHECK: bb.1:
 # CHECK: renamable $eax = COPY $edi
-# CHECK-NEXT: DBG_VALUE debug-use $eax,
+# CHECK-NEXT: DBG_VALUE $eax,
 # CHECK: bb.2:
 name:            x1
 alignment:       4
@@ -71,9 +71,9 @@ body: |
   bb.0:
     successors: %bb.2, %bb.1; %bb.2, %bb.1
     liveins: $edi
-    DBG_VALUE debug-use $edi, debug-use $noreg, !14, !DIExpression(), debug-location !16
+    DBG_VALUE $edi, $noreg, !14, !DIExpression(), debug-location !16
     renamable $eax = COPY $edi
-    DBG_VALUE debug-use $eax, debug-use $noreg, !14, !DIExpression(), debug-location !16
+    DBG_VALUE $eax, $noreg, !14, !DIExpression(), debug-location !16
     CMP32mi8 $rip, 1, $noreg, @x0, $noreg, 0, implicit-def $eflags, debug-location !16
     JE_1 %bb.2, implicit killed $eflags, debug-location !16
     JMP_1 %bb.1, debug-location !16
diff --git a/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
index 429ea72db8e..6943033c565 100644
--- a/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
+++ b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
@@ -136,8 +136,8 @@ body:             |
     successors: %bb.4(0x40000000), %bb.1(0x40000000)
     liveins: $ecx, $edx
   
-    DBG_VALUE debug-use $edx, debug-use $noreg, !15, !DIExpression(), debug-location !25
-    DBG_VALUE debug-use $ecx, debug-use $noreg, !16, !DIExpression(), debug-location !26
+    DBG_VALUE $edx, $noreg, !15, !DIExpression(), debug-location !25
+    DBG_VALUE $ecx, $noreg, !16, !DIExpression(), debug-location !26
     $eax = COPY $ecx
     DBG_VALUE %fixed-stack.0, 0, !16, !DIExpression(), debug-location !26
     DBG_VALUE %fixed-stack.1, 0, !15, !DIExpression(), debug-location !25
@@ -149,9 +149,9 @@ body:             |
     successors: %bb.2(0x80000000)
   
     $esi = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load 4 from %fixed-stack.0)
-    DBG_VALUE debug-use $esi, debug-use $noreg, !13, !DIExpression(), debug-location !19
+    DBG_VALUE $esi, $noreg, !13, !DIExpression(), debug-location !19
     $edi = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (load 4 from %fixed-stack.1)
-    DBG_VALUE debug-use $edi, debug-use $noreg, !14, !DIExpression(), debug-location !20
+    DBG_VALUE $edi, $noreg, !14, !DIExpression(), debug-location !20
     $edi = DEC32r killed $edi, implicit-def dead $eflags, debug-location !30
     $ebx = LEA32r %fixed-stack.1, 1, $noreg, 0, $noreg