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authorSimon Pilgrim <llvm-dev@redking.me.uk>2016-10-19 17:12:22 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2016-10-19 17:12:22 +0000
commita20aeea9986ff1d7bbc6f01ef351e602552f1720 (patch)
tree79e942e8fd6471cf7b861c6c856b350b6911736a /llvm/test/CodeGen
parentf7ad5341d056a40c1308f1a3a13dd76f42d52894 (diff)
downloadbcm5719-llvm-a20aeea9986ff1d7bbc6f01ef351e602552f1720.tar.gz
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[DAGCombiner] Add general constant vector support to (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)
We already supported scalar constant / splatted constant vector - now accepts any (non opaque) constant scalar / vector llvm-svn: 284613
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/X86/combine-shl.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/combine-shl.ll b/llvm/test/CodeGen/X86/combine-shl.ll
index e97880369f5..3f3871ec5c3 100644
--- a/llvm/test/CodeGen/X86/combine-shl.ll
+++ b/llvm/test/CodeGen/X86/combine-shl.ll
@@ -526,8 +526,8 @@ define <4 x i32> @combine_vec_shl_add1(<4 x i32> %x) {
;
; AVX-LABEL: combine_vec_shl_add1:
; AVX: # BB#0:
-; AVX-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq
%1 = add <4 x i32> %x, <i32 5, i32 6, i32 7, i32 8>
%2 = shl <4 x i32> %1, <i32 1, i32 2, i32 3, i32 4>
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